From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 98515 invoked by alias); 12 Sep 2017 20:25:07 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 98463 invoked by uid 89); 12 Sep 2017 20:25:07 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW,T_COMPENSATION autolearn=no version=3.3.2 spammy=fuss X-HELO: mx0a-001b2d01.pphosted.com Subject: Re: [PATCH] powerpc: Use aligned stores in memset From: Steven Munroe Reply-To: munroesj@linux.vnet.ibm.com To: Florian Weimer Cc: Rajalakshmi Srinivasaraghavan , libc-alpha@sourceware.org In-Reply-To: References: <1503033107-20047-1-git-send-email-raji@linux.vnet.ibm.com> <1505223476.12360.14.camel@oc7878010663> <87wp54vwk4.fsf@mid.deneb.enyo.de> <1505225800.12360.28.camel@oc7878010663> <1505244094.12360.36.camel@oc7878010663> Content-Type: text/plain; charset="UTF-8" Date: Tue, 12 Sep 2017 20:25:00 -0000 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 17091220-0012-0000-0000-000014FF29ED X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007713; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000227; SDB=6.00916091; UDB=6.00459993; IPR=6.00696323; BA=6.00005587; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017130; XFM=3.00000015; UTC=2017-09-12 20:25:03 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17091220-0013-0000-0000-00004F75EFA2 Message-Id: <1505247898.12360.45.camel@oc7878010663> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-09-12_09:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1709120289 X-SW-Source: 2017-09/txt/msg00525.txt.bz2 On Tue, 2017-09-12 at 21:45 +0200, Florian Weimer wrote: > On 09/12/2017 09:21 PM, Steven Munroe wrote: > > On Tue, 2017-09-12 at 19:04 +0200, Florian Weimer wrote: > >> On 09/12/2017 04:16 PM, Steven Munroe wrote: > >>> On Tue, 2017-09-12 at 16:08 +0200, Florian Weimer wrote: > >>>> * Steven Munroe: > >>>> > >>>>>> This means that GCC introduced an unaligned store, no matter how memset > >>>>>> was implemented. > >>>>>> > >>>>> C will do what ever the programmer wants. We can not stop that. > >>>> > >>>> That's not true. If some specification says that for POWER, mem* must > >>>> behave in a certain way, and the GCC/glibc combiniation does not do > >>>> that, that's a bug on POWER. > >>>> > >>> What is the bug that you think we are not fixing? > >> > >> memset, as called by the C programmer, still uses unaligned stores. > > Please look at my example and its disassembly. > > > We are not going to version every loop that might contain stores based > > on speculation that someone who does not know what they are doing might > > access Cache Inhibited storage. > > You need to remove optimizations from GCC which expand memset calls > using other instructions if those expansions do not compensate for the > possibility of unaligned stores. > No, the programmer should use -fno-builtin-memset if that programmer knows he is accessing cache inhibited space. To be clear this is not new, cache coherent and cache inhibited storage have been in the PowerISA from the beginning. So why all the fuss now?