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From: Nicholas Piggin <npiggin@gmail.com>
To: libc-alpha@sourceware.org, Matheus Castanho <msc@linux.ibm.com>
Cc: schwab@linux-m68k.org, tuliom@linux.ibm.com,
	Segher Boessenkool <segher@kernel.crashing.org>
Subject: Re: [PATCH v2] powerpc: Add missing registers to clobbers list for syscalls [BZ #27623]
Date: Thu, 01 Apr 2021 17:40:01 +1000	[thread overview]
Message-ID: <1617262589.sp64uzefnd.astroid@bobo.none> (raw)
In-Reply-To: <20210329133557.185178-1-msc@linux.ibm.com>

Excerpts from Matheus Castanho's message of March 29, 2021 11:35 pm:
> Some registers that can be clobbered by the kernel during a syscall are not
> listed on the clobbers list in sysdeps/unix/sysv/linux/powerpc/sysdep.h.
> 
> For syscalls using sc:
>     - XER is zeroed by the kernel on exit
> 
> For syscalls using scv:
>     - XER is zeroed by the kernel on exit
>     - Different from the sc case, most CR fields can be clobbered (according to
>       the ELF ABI and the Linux kernel's syscall ABI for powerpc
>       (linux/Documentation/powerpc/syscall64-abi.rst)
> 
> The same should apply to vsyscalls, which effectively execute a function call
> but are not currently adding these registers as clobbers either.
> 
> These are likely not causing issues today, but they should be added to the
> clobbers list just in case things change on the kernel side in the future.
> 
> Reported-by: Nicholas Piggin <npiggin@gmail.com>

As far as I can tell, this should be matching the kernel now.

Thanks,
Nick

> ---
> 
> Changes from v1:
>   - Add XER, CR1, CR5-7 to vsyscall clobbers list
> 
> ---
>  sysdeps/unix/sysv/linux/powerpc/sysdep.h | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/sysdeps/unix/sysv/linux/powerpc/sysdep.h b/sysdeps/unix/sysv/linux/powerpc/sysdep.h
> index 6b99464e61..2f31f9177b 100644
> --- a/sysdeps/unix/sysv/linux/powerpc/sysdep.h
> +++ b/sysdeps/unix/sysv/linux/powerpc/sysdep.h
> @@ -56,7 +56,9 @@
>         "0:"								\
>         : "+r" (r0), "+r" (r3), "+r" (r4), "+r" (r5),  "+r" (r6),        \
>           "+r" (r7), "+r" (r8)						\
> -       : : "r9", "r10", "r11", "r12", "cr0", "ctr", "lr", "memory");	\
> +       : : "r9", "r10", "r11", "r12",					\
> +           "cr0", "cr1", "cr5", "cr6", "cr7",				\
> +           "xer", "lr", "ctr", "memory");				\
>      __asm__ __volatile__ ("" : "=r" (rval) : "r" (r3));		        \
>      (long int) r0 & (1 << 28) ? -rval : rval;				\
>    })
> @@ -86,7 +88,8 @@
>  	 "=&r" (r6), "=&r" (r7), "=&r" (r8)	\
>         : ASM_INPUT_##nr			\
>         : "r9", "r10", "r11", "r12",		\
> -	 "lr", "ctr", "memory");		\
> +	 "cr0", "cr1", "cr5", "cr6", "cr7",	\
> +	 "xer", "lr", "ctr", "memory"); 	\
>      r3;					\
>    })
> 
> @@ -101,7 +104,7 @@
>  	 "=&r" (r6), "=&r" (r7), "=&r" (r8)	\
>         : ASM_INPUT_##nr			\
>         : "r9", "r10", "r11", "r12",		\
> -	 "cr0", "ctr", "memory");		\
> +	 "xer", "cr0", "ctr", "memory");	\
>      r0 & (1 << 28) ? -r3 : r3;			\
>    })
> 
> --
> 2.30.2
> 

  reply	other threads:[~2021-04-01  7:40 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-29 13:35 Matheus Castanho
2021-04-01  7:40 ` Nicholas Piggin [this message]
2021-04-09 13:07 ` Raphael M Zinsly
2021-04-16 11:44 ` Matheus Castanho

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