From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id D8BA4385800A for ; Tue, 11 May 2021 21:12:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org D8BA4385800A Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14BL2feu080324 for ; Tue, 11 May 2021 17:12:24 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com with ESMTP id 38g1d98d18-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 11 May 2021 17:12:24 -0400 Received: from m0098420.ppops.net (m0098420.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 14BL2k0s080646 for ; Tue, 11 May 2021 17:12:24 -0400 Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0b-001b2d01.pphosted.com with ESMTP id 38g1d98d0x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 May 2021 17:12:24 -0400 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.0.43/8.16.0.43) with SMTP id 14BL8Sld008350; Tue, 11 May 2021 21:12:23 GMT Received: from b01cxnp22033.gho.pok.ibm.com (b01cxnp22033.gho.pok.ibm.com [9.57.198.23]) by ppma02dal.us.ibm.com with ESMTP id 38dj996ucb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 May 2021 21:12:23 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 14BLCMGE23986668 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 11 May 2021 21:12:22 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9E4DBAC05B; Tue, 11 May 2021 21:12:22 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F0ACDAC05F; Tue, 11 May 2021 21:12:21 +0000 (GMT) Received: from localhost (unknown [9.85.179.12]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Tue, 11 May 2021 21:12:21 +0000 (GMT) Content-Type: text/plain; charset="utf-8" In-Reply-To: References: Subject: Re: [PATCH 2/3] powerpc64le: Check HWCAP bits against compiler build flags From: "Lucas A. M. Magalhaes" To: Florian Weimer , libc-alpha@sourceware.org Date: Tue, 11 May 2021 18:12:17 -0300 Message-ID: <162076753769.316372.10532385586864995177@fedora.local> User-Agent: alot/0.9.1 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: -KgEWO1qh60QYqt45W_HoAtxo9t-2l7R X-Proofpoint-GUID: NcOdiYPRjpWUpd0uGkOm8UgP0JGsQrS8 Content-Transfer-Encoding: quoted-printable X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-11_04:2021-05-11, 2021-05-11 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 impostorscore=0 mlxlogscore=999 bulkscore=0 suspectscore=0 mlxscore=0 phishscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2105110143 X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, URIBL_BLACK autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 11 May 2021 21:12:26 -0000 Hi Florian. I've tested this patch on POWER[8..10] with -mcpu=3Dpower9 and -mcpu=3Dpower10 built with GCC 10.3.1. When built with -mcpu=3Dpower10 I got a SIGILL on POWER8 and POWER10. For testing I'm just running ./libc.so. I try to inspect it with gdb. With -mcpu=3Dpower9 I can see it passing through dl_hwcap_check but not with -mcpu=3Dpower10. I maybe doing something wrong though. --- Lucas A. M. Magalh=C3=A3es Quoting Florian Weimer via Libc-alpha (2021-05-06 09:30:15) > When built with GCC 11.1 and -mcpu=3Dpower9, ld.so prints this error > message when running on POWER8: >=20 > Fatal glibc error: CPU lacks ISA 3.00 support (POWER9 or later required) >=20 > This approach does not work for the POWER10 because the bootstrap > relocation already uses PCREL instructions, so the detection code does > not actually run. > --- > sysdeps/powerpc/powerpc64/le/dl-hwcap-check.h | 49 +++++++++++++++++++ > 1 file changed, 49 insertions(+) > create mode 100644 sysdeps/powerpc/powerpc64/le/dl-hwcap-check.h >=20 > diff --git a/sysdeps/powerpc/powerpc64/le/dl-hwcap-check.h b/sysdeps/powe= rpc/powerpc64/le/dl-hwcap-check.h > new file mode 100644 > index 0000000000..6c7949c6d2 > --- /dev/null > +++ b/sysdeps/powerpc/powerpc64/le/dl-hwcap-check.h > @@ -0,0 +1,49 @@ > +/* Check for hardware capabilities after HWCAP parsing. powerpc64le ver= sion. > + Copyright (C) 2021 Free Software Foundation, Inc. > + This file is part of the GNU C Library. > + > + The GNU C Library is free software; you can redistribute it and/or > + modify it under the terms of the GNU Lesser General Public > + License as published by the Free Software Foundation; either > + version 2.1 of the License, or (at your option) any later version. > + > + The GNU C Library is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + Lesser General Public License for more details. > + > + You should have received a copy of the GNU Lesser General Public > + License along with the GNU C Library; if not, see > + . */ > + > +#ifndef _DL_HWCAP_CHECK_H > +#define _DL_HWCAP_CHECK_H > + > +#include > + > +static inline void > +dl_hwcap_check (void) > +{ > +#ifdef _ARCH_PWR9 > + if ((GLRO (dl_hwcap2) & PPC_FEATURE2_ARCH_3_00) =3D=3D 0) > + _dl_fatal_printf ("\ > +Fatal glibc error: CPU lacks ISA 3.00 support (POWER9 or later required)= \n"); > +#endif > +#ifdef __FLOAT128_HARDWARE__ > + if ((GLRO (dl_hwcap2) & PPC_FEATURE2_HAS_IEEE128) =3D=3D 0) > + _dl_fatal_printf ("\ > +Fatal glibc error: CPU lacks float128 support (POWER 9 or later required= )\n"); > +#endif > +#if defined _ARCH_PWR10 || defined __PCREL__ > + if ((GLRO (dl_hwcap2) & PPC_FEATURE2_ARCH_3_1) =3D=3D 0) > + _dl_fatal_printf ("\ > +Fatal glibc error: CPU lacks ISA 3.10 support (POWER10 or later required= )\n"); > +#endif > +#ifdef __MMA__ > + if ((GLRO (dl_hwcap2) & PPC_FEATURE2_MMA) =3D=3D 0) > + _dl_fatal_printf ("\ > +Fatal glibc error: CPU lacks MMA support (POWER10 or later required)\n"); > +#endif > +} > + > +#endif /* _DL_HWCAP_CHECK_H */ > --=20 > 2.30.2 >=20 >