From: Segher Boessenkool <segher@kernel.crashing.org>
To: "Paul E. Murphy" <murphyp@linux.vnet.ibm.com>
Cc: "libc-alpha@sourceware.org" <libc-alpha@sourceware.org>,
Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
Subject: Re: [PATCHv2] powerpc: Add optimized P8 strspn
Date: Mon, 04 Apr 2016 16:42:00 -0000 [thread overview]
Message-ID: <20160404164211.GA2517@gate.crashing.org> (raw)
In-Reply-To: <57027ECE.7070101@linux.vnet.ibm.com>
On Mon, Apr 04, 2016 at 09:48:46AM -0500, Paul E. Murphy wrote:
> >> + lvsr v11, r0, r3
> >
> > That is 0, not r0.
> >
> >> + lvx v0, r0, r3 /* Note, unaligned load ignores lower bits. */
> >
> > Same for lvx.
>
> I'd intentionally used r0 in those cases to explicitly exploit its special
> meaning under those instructions. It it customary to explicitly use 0 in
> such cases?
Yes; the ISA document has many examples of this, see for example 6.4.1
in the Power ISA 3.0 doc.
Using "r0" here is quite misleading.
Segher
prev parent reply other threads:[~2016-04-04 16:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-30 16:34 Paul E. Murphy
2016-04-02 23:40 ` Segher Boessenkool
2016-04-04 14:48 ` Paul E. Murphy
2016-04-04 16:42 ` Segher Boessenkool [this message]
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