From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 58839 invoked by alias); 9 Nov 2016 17:16:00 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 58809 invoked by uid 89); 9 Nov 2016 17:15:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 spammy=outcomes, Hx-languages-length:1327, straight, H*m:121552 X-HELO: shards.monkeyblade.net Date: Wed, 09 Nov 2016 17:16:00 -0000 Message-Id: <20161109.121552.63825213147087515.davem@davemloft.net> To: triegel@redhat.com Cc: carlos@redhat.com, adhemerval.zanella@linaro.org, andreas@gaisler.com, libc-alpha@sourceware.org, software@gaisler.com Subject: Re: Remove sparcv8 support From: David Miller In-Reply-To: <1478711295.7146.969.camel@localhost.localdomain> References: <502720f6-3057-41f5-7832-4b219f5f729f@redhat.com> <20161107.113825.631166023186879199.davem@davemloft.net> <1478711295.7146.969.camel@localhost.localdomain> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2016-11/txt/msg00347.txt.bz2 From: Torvald Riegel Date: Wed, 09 Nov 2016 09:08:15 -0800 > What approach are you going to use in the kernel to emulate the CAS if > the hardware doesn't offer one? If you are not stopping all threads, > then there could be concurrent stores to the same memory location > targeted by the CAS; to make such stores atomic wrt. the CAS, you would > need to implement atomic stores in glibc to also use the kernel (eg, to > do a CAS). I keep hearing about this case, but as long as the CAS is atomic what is the difference between the store being synchronized in some way or not? I think the ordering allowed for gives the same set of legal results. In any possible case either the CAS "wins" or the async store "wins" and that determines the final result written. All combinations are legal outcomes even with a hardware CAS implementation. I really don't think such asynchronous stores are legal, nor should the be explicitly accomodated in the CAS emulation support. Either the value is maintained in an atomic manner, or it is not. And if it is, updates must use CAS. Straight stores are only legal on the initialization of the word before any CAS code paths can get to the value. I cannot think of any sane setup that can allow async stores intermixed with CAS updates.