From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from port70.net (port70.net [81.7.13.123]) by sourceware.org (Postfix) with ESMTP id 3C5DC385B835 for ; Thu, 16 Apr 2020 09:58:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 3C5DC385B835 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=port70.net Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nsz@port70.net Received: by port70.net (Postfix, from userid 1002) id 79BA6ABEC0BA; Thu, 16 Apr 2020 11:58:00 +0200 (CEST) Date: Thu, 16 Apr 2020 11:58:00 +0200 From: Szabolcs Nagy To: Nicholas Piggin via Libc-alpha Cc: Rich Felker , libc-dev@lists.llvm.org, linuxppc-dev@lists.ozlabs.org, musl@lists.openwall.com Subject: Re: [musl] Powerpc Linux 'scv' system call ABI proposal take 2 Message-ID: <20200416095800.GC23945@port70.net> Mail-Followup-To: Nicholas Piggin via Libc-alpha , Rich Felker , libc-dev@lists.llvm.org, linuxppc-dev@lists.ozlabs.org, musl@lists.openwall.com References: <1586931450.ub4c8cq8dj.astroid@bobo.none> <20200415225539.GL11469@brightrain.aerifal.cx> <1586994952.nnxigedbu2.astroid@bobo.none> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1586994952.nnxigedbu2.astroid@bobo.none> User-Agent: Mutt/1.10.1 (2018-07-13) X-Spam-Status: No, score=1.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_NUMSUBJECT, SPF_HELO_PASS, SPF_PASS, SUSPICIOUS_RECIPS autolearn=no autolearn_force=no version=3.4.2 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Apr 2020 09:58:04 -0000 * Nicholas Piggin via Libc-alpha [2020-04-16 10:16:54 +1000]: > Well it would have to test HWCAP and patch in or branch to two > completely different sequences including register save/restores yes. > You could have the same asm and matching clobbers to put the sequence > inline and then you could patch the one sc/scv instruction I suppose. how would that 'patch' work? there are many reasons why you don't want libc to write its .text