From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x643.google.com (mail-pl1-x643.google.com [IPv6:2607:f8b0:4864:20::643]) by sourceware.org (Postfix) with ESMTPS id A9EA23954C16 for ; Tue, 28 Apr 2020 21:52:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org A9EA23954C16 Received: by mail-pl1-x643.google.com with SMTP id s10so27463plr.1 for ; Tue, 28 Apr 2020 14:52:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kHGKyJiV3elR3giMovRjTMY40JpWrImVsLg0VEBRBtw=; b=o2CPMivXMXZBAPiDIhUVKWS9cAFfMtvFcF6N5ZleogOav3csauiMrz1MR3kZ5gl5Dy Pj1YVXBa8qF/RCXeVwY6bj8zClzf4ooDHrfAscJTbfF2PDI0sTyYAwIRH1TcHZsHO+9Z DmsMOAxn9fjWGHZu36Oej7vzUcIVXn6VDJmRPfvtGYkpfuQwlkiVpq1oY0O2ItdjbT7f fg/mCEMZzdOP30lzuIghVIeD6PXaAT39m7ee0kgjWLHmHL1xrg5DnD1XHyiB8gWRbCBE zoV1jI4qMTM4SD80U59mn13R2sBPNue0DF777P+OWHlS6jEZo+fM87IKujoeBAdyKIjc TsVg== X-Gm-Message-State: AGi0PuaKOEMI+R5zvrm41SX0colSVPqueWRu8Ql/nikcIK8SpI8IXtbU cELdy1lHqMqQA/n20LWRNNKfCX79 X-Google-Smtp-Source: APiQypLd+0dkT5LoAOJckc2ioQqahFYw3mF0gcs3jKDuY2wDPMjGAf/QpIVGV2j/AVm+On70cyJmUw== X-Received: by 2002:a17:90b:19c1:: with SMTP id nm1mr7606947pjb.73.1588110765705; Tue, 28 Apr 2020 14:52:45 -0700 (PDT) Received: from gnu-cfl-2.localdomain (c-69-181-90-243.hsd1.ca.comcast.net. [69.181.90.243]) by smtp.gmail.com with ESMTPSA id e4sm14306683pge.45.2020.04.28.14.52.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Apr 2020 14:52:44 -0700 (PDT) Received: from gnu-cfl-2.localdomain (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 9EFF7C03D1; Tue, 28 Apr 2020 14:52:43 -0700 (PDT) From: "H.J. Lu" To: libc-alpha@sourceware.org Subject: [PATCH 1/3] CET: Rename CET_MAX to CET_CONTROL_MASK [BZ #25887] Date: Tue, 28 Apr 2020 14:52:41 -0700 Message-Id: <20200428215243.236312-2-hjl.tools@gmail.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200428215243.236312-1-hjl.tools@gmail.com> References: <20200428215243.236312-1-hjl.tools@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-22.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Apr 2020 21:52:48 -0000 _dl_x86_feature_1[1] is used to control each CET feature, IBT and SHSTK: /* Valid control values: 0: Enable CET features based on ELF property note. 1: Always disable CET features. 2: Always enable CET features. 3: Enable CET features permissively. */ #define CET_ELF_PROPERTY 0 #define CET_ALWAYS_OFF 1 #define CET_ALWAYS_ON 2 #define CET_PERMISSIVE 3 #define CET_MAX CET_PERMISSIVE CET control value takes 2 bits. Rename CET_MAX to CET_CONTROL_MASK. Add CET_IBT_SHIFT and CET_SHSTK_SHIFT. --- sysdeps/x86/cet-tunables.h | 22 +++++++++++++++++++-- sysdeps/x86/cpu-features.c | 7 +++---- sysdeps/x86/cpu-tunables.c | 39 +++++++++++++++----------------------- sysdeps/x86/dl-cet.c | 6 ++---- 4 files changed, 40 insertions(+), 34 deletions(-) diff --git a/sysdeps/x86/cet-tunables.h b/sysdeps/x86/cet-tunables.h index 5e1e42df10..0088b89d3e 100644 --- a/sysdeps/x86/cet-tunables.h +++ b/sysdeps/x86/cet-tunables.h @@ -16,14 +16,32 @@ License along with the GNU C Library; if not, see . */ -/* Valid control values: +#ifndef _CET_TUNABLES_H +#define _CET_TUNABLES_H + +/* For each CET feature, IBT and SHSTK, valid control values: 0: Enable CET features based on ELF property note. 1: Always disable CET features. 2: Always enable CET features. 3: Enable CET features permissively. + + Bits 0-1: IBT + Bits 2-3: SHSTK */ #define CET_ELF_PROPERTY 0 #define CET_ALWAYS_OFF 1 #define CET_ALWAYS_ON 2 #define CET_PERMISSIVE 3 -#define CET_MAX CET_PERMISSIVE +#define CET_CONTROL_MASK 3 +#define CET_IBT_SHIFT 0 +#define CET_SHSTK_SHIFT 2 + +/* Get CET control value. */ + +static inline unsigned int +get_cet_control_value (unsigned int shift) +{ + return (GL(dl_x86_feature_1)[1] >> shift) & CET_CONTROL_MASK; +} + +#endif /* cet-tunables.h */ diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 81a170a819..76a6476607 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -594,10 +594,9 @@ no_cpuid: } /* Lock CET if IBT or SHSTK is enabled in executable. Don't - lock CET if SHSTK is enabled permissively. */ - if (((GL(dl_x86_feature_1)[1] >> CET_MAX) - & ((1 << CET_MAX) - 1)) - != CET_PERMISSIVE) + lock CET if IBT or SHSTK is enabled permissively. */ + if (get_cet_control_value (CET_IBT_SHIFT) != CET_PERMISSIVE + && get_cet_control_value (CET_SHSTK_SHIFT) != CET_PERMISSIVE) dl_cet_lock_cet (); } # endif diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c index 861bd7bcaa..c8fc5e67d9 100644 --- a/sysdeps/x86/cpu-tunables.c +++ b/sysdeps/x86/cpu-tunables.c @@ -338,26 +338,26 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp) # if CET_ENABLED # include +/* Set CET control value. */ + +static inline void +set_cet_control_value (unsigned int value, unsigned int shift) +{ + GL(dl_x86_feature_1)[1] &= ~(CET_CONTROL_MASK << shift); + GL(dl_x86_feature_1)[1] |= value << shift; +} + attribute_hidden void TUNABLE_CALLBACK (set_x86_ibt) (tunable_val_t *valp) { if (DEFAULT_MEMCMP (valp->strval, "on", sizeof ("on")) == 0) - { - GL(dl_x86_feature_1)[1] &= ~((1 << CET_MAX) - 1); - GL(dl_x86_feature_1)[1] |= CET_ALWAYS_ON; - } + set_cet_control_value (CET_ALWAYS_ON, CET_IBT_SHIFT); else if (DEFAULT_MEMCMP (valp->strval, "off", sizeof ("off")) == 0) - { - GL(dl_x86_feature_1)[1] &= ~((1 << CET_MAX) - 1); - GL(dl_x86_feature_1)[1] |= CET_ALWAYS_OFF; - } + set_cet_control_value (CET_ALWAYS_OFF, CET_IBT_SHIFT); else if (DEFAULT_MEMCMP (valp->strval, "permissive", sizeof ("permissive")) == 0) - { - GL(dl_x86_feature_1)[1] &= ~((1 << CET_MAX) - 1); - GL(dl_x86_feature_1)[1] |= CET_PERMISSIVE; - } + set_cet_control_value (CET_PERMISSIVE, CET_IBT_SHIFT); } attribute_hidden @@ -365,21 +365,12 @@ void TUNABLE_CALLBACK (set_x86_shstk) (tunable_val_t *valp) { if (DEFAULT_MEMCMP (valp->strval, "on", sizeof ("on")) == 0) - { - GL(dl_x86_feature_1)[1] &= ~(((1 << CET_MAX) - 1) << CET_MAX); - GL(dl_x86_feature_1)[1] |= (CET_ALWAYS_ON << CET_MAX); - } + set_cet_control_value (CET_ALWAYS_ON, CET_SHSTK_SHIFT); else if (DEFAULT_MEMCMP (valp->strval, "off", sizeof ("off")) == 0) - { - GL(dl_x86_feature_1)[1] &= ~(((1 << CET_MAX) - 1) << CET_MAX); - GL(dl_x86_feature_1)[1] |= (CET_ALWAYS_OFF << CET_MAX); - } + set_cet_control_value (CET_ALWAYS_OFF, CET_SHSTK_SHIFT); else if (DEFAULT_MEMCMP (valp->strval, "permissive", sizeof ("permissive")) == 0) - { - GL(dl_x86_feature_1)[1] &= ~(((1 << CET_MAX) - 1) << CET_MAX); - GL(dl_x86_feature_1)[1] |= (CET_PERMISSIVE << CET_MAX); - } + set_cet_control_value (CET_PERMISSIVE, CET_SHSTK_SHIFT); } # endif #endif diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c index c7029f1b51..0f115540aa 100644 --- a/sysdeps/x86/dl-cet.c +++ b/sysdeps/x86/dl-cet.c @@ -39,11 +39,9 @@ static void dl_cet_check (struct link_map *m, const char *program) { /* Check how IBT should be enabled. */ - unsigned int enable_ibt_type - = GL(dl_x86_feature_1)[1] & ((1 << CET_MAX) - 1); + unsigned int enable_ibt_type = get_cet_control_value (CET_IBT_SHIFT); /* Check how SHSTK should be enabled. */ - unsigned int enable_shstk_type - = ((GL(dl_x86_feature_1)[1] >> CET_MAX) & ((1 << CET_MAX) - 1)); + unsigned int enable_shstk_type = get_cet_control_value (CET_SHSTK_SHIFT); /* No legacy object check if both IBT and SHSTK are always on. */ if (enable_ibt_type == CET_ALWAYS_ON -- 2.25.4