[PATCH 0/3] ld.so: Add --list-tunables to print tunable values

["H.J. Lu" <hjl.tools@gmail.com>]

Tunable values and their minimum/maximum values are invisible to users.
This patch set adds --list-tunables to ld.so to print tunable values
with their minimum and maximum values.  For these tunables whose values
and minimum/maximum values are determinted at run-time, TUNABLE_SET_ALL
and TUNABLE_SET_ALL_FULL are added to update tunable values together with
their minimum and maximum values.  

--list-tunables works on i686 and x86-64.  Please test --list-tunables on
your native processors.  users/hjl/tunable/master branch at:

https://gitlab.com/x86-glibc/glibc/-/commits/users/hjl/tunable/master

contains the same set of patches.

On x86, to make cache info accessible to --list-tunables, they are moved
to cpu_features in ld.so and initialized by dummy function pointers via
IFUNC relocation.  CPU features are initialized by DL_PLATFORM_INIT in
dynamic executable and by ARCH_INIT_CPU_FEATURES in static executable.
To initialize CPU features when loading ld.so inside of static executable,
where DL_PLATFORM_INIT isn't called, CPU features are also initialized by
dummy function pointers via IFUNC relocation.

$ ./elf/ld.so --list-tunables
glibc.rtld.nns: 0x4 (min: 0x1, max: 0x10)
glibc.elision.skip_lock_after_retries: 3 (min: -2147483648, max: 2147483647)
glibc.malloc.trim_threshold: 0x0 (min: 0x0, max: 0xffffffff)
glibc.malloc.perturb: 0 (min: 0, max: 255)
glibc.cpu.x86_shared_cache_size: 0x0 (min: 0x0, max: 0xffffffff)
glibc.elision.tries: 3 (min: -2147483648, max: 2147483647)
glibc.elision.enable: 0 (min: 0, max: 1)
glibc.cpu.x86_rep_movsb_threshold: 0x800 (min: 0x100, max: 0xffffffff)
glibc.malloc.mxfast: 0x0 (min: 0x0, max: 0xffffffff)
glibc.elision.skip_lock_busy: 3 (min: -2147483648, max: 2147483647)
glibc.malloc.top_pad: 0x0 (min: 0x0, max: 0xffffffff)
glibc.cpu.x86_rep_stosb_threshold: 0x800 (min: 0x1, max: 0xffffffff)
glibc.cpu.x86_non_temporal_threshold: 0x0 (min: 0x0, max: 0xffffffff)
glibc.cpu.x86_shstk: 
glibc.cpu.hwcap_mask: 0x1 (min: 0x0, max: 0xffffffff)
glibc.malloc.mmap_max: 0 (min: -2147483648, max: 2147483647)
glibc.elision.skip_trylock_internal_abort: 3 (min: -2147483648, max: 2147483647)
glibc.malloc.tcache_unsorted_limit: 0x0 (min: 0x0, max: 0xffffffff)
glibc.cpu.x86_ibt: 
glibc.cpu.hwcaps: 
glibc.elision.skip_lock_internal_abort: 3 (min: -2147483648, max: 2147483647)
glibc.malloc.arena_max: 0x0 (min: 0x1, max: 0xffffffff)
glibc.malloc.mmap_threshold: 0x0 (min: 0x0, max: 0xffffffff)
glibc.cpu.x86_data_cache_size: 0x0 (min: 0x0, max: 0xffffffff)
glibc.malloc.tcache_count: 0x0 (min: 0x0, max: 0xffffffff)
glibc.malloc.arena_test: 0x0 (min: 0x1, max: 0xffffffff)
glibc.pthread.mutex_spin_count: 100 (min: 0, max: 32767)
glibc.rtld.optional_static_tls: 0x200 (min: 0x0, max: 0xffffffff)
glibc.malloc.tcache_max: 0x0 (min: 0x0, max: 0xffffffff)
glibc.malloc.check: 0 (min: 0, max: 3)

H.J. Lu (3):
  x86: Initialize CPU info via IFUNC relocation [BZ 26203]
  Set tunable value as well as min/max values
  ld.so: Add --list-tunables to print tunable values

 NEWS                               |   2 +
 elf/Makefile                       |   6 +-
 elf/dl-tunables.c                  |  53 +-
 elf/dl-tunables.h                  |  20 +-
 elf/rtld.c                         |  37 +-
 manual/README.tunables             |  24 +-
 manual/tunables.texi               |  37 ++
 sysdeps/i386/dl-machine.h          |   3 +-
 sysdeps/x86/cacheinfo.c            | 873 ++-------------------------
 sysdeps/x86/cpu-cacheinfo.c        | 922 +++++++++++++++++++++++++++++
 sysdeps/x86/cpu-features.c         |  25 +-
 sysdeps/x86/dl-get-cpu-features.c  |  25 +-
 sysdeps/x86/include/cpu-features.h |  23 +
 sysdeps/x86_64/dl-machine.h        |   3 +-
 14 files changed, 1201 insertions(+), 852 deletions(-)
 create mode 100644 sysdeps/x86/cpu-cacheinfo.c

-- 
2.26.2