From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by sourceware.org (Postfix) with ESMTP id D4899386EC33 for ; Tue, 3 Nov 2020 23:04:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org D4899386EC33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=segher@kernel.crashing.org Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 0A3N2utQ017523; Tue, 3 Nov 2020 17:02:56 -0600 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 0A3N2trL017520; Tue, 3 Nov 2020 17:02:55 -0600 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Tue, 3 Nov 2020 17:02:55 -0600 From: Segher Boessenkool To: Florian Weimer Cc: Tulio Magno Quites Machado Filho , libc-alpha@sourceware.org, "Paul A. Clarke" , wschmidt@linux.ibm.com Subject: Re: [PATCH v2 3/3] powerpc64le: Add glibc-hwcaps support Message-ID: <20201103230255.GQ2672@gate.crashing.org> References: <87pn4zfgyh.fsf@linux.ibm.com> <874km8hxo7.fsf@oldenburg2.str.redhat.com> <87mtzyfp5g.fsf@linux.ibm.com> <87361q8kvf.fsf@oldenburg2.str.redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87361q8kvf.fsf@oldenburg2.str.redhat.com> User-Agent: Mutt/1.4.2.3i X-Spam-Status: No, score=-6.4 required=5.0 tests=BAYES_00, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, TXREP, T_SPF_HELO_PERMERROR, T_SPF_PERMERROR autolearn=no autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 03 Nov 2020 23:04:05 -0000 Hi! (Cc: Bill) On Tue, Nov 03, 2020 at 05:29:08PM +0100, Florian Weimer via Libc-alpha wrote: > * Tulio Magno Quites Machado Filho: > > Florian Weimer writes: > >> I think we need documentation what it means for a processor to implement > >> ISA 3.0, and not altivec. Or for that matter, what an implementation of > >> powerpc64le-*-linux-gnu without altivec looks like. Presumably, it will > >> be different yet again from the original hardware used during > >> architecture bring-up. > > > > I think we already have this documented in a couple of places in different > > documents from the OpenPOWER Foundation. > > Yes, but all those documents say that Altivec + VSX are required for > powerpc64le-*-linux-gnu. Your summary below seems to re-confirm that. > > My point was that if we want powerpc64le-*-linux-gnu to stand for > something different (without Altivec/VSX), we need (new) documentation > that says what it means. Not going to happen. A new powerpc64le-linux-novec triple (or whatever naming, this is just an example) can be made of course, but the existing name will keep standing for the existing ABI! > >> ISA features that cannot automatically and pervasively used by compilers > >> can be excluded as well. MMA could be in that category, and I think > >> cryptography-related instructions generally are. > > > > MMA is indeed optional for Linux. > > AFAICS, cryptography-related instructions are part of SIMD and should be > > required for Linux. > > Then I think we should change GCC not to enable MMA with -mcpu=power10. No. -mcpu=power10 enables MMA. If you do not want all Power10 features, you should not use -mcpu=power10. It is that simple. Since powerpc64le-linux requires Power8 or later, you always have VMX and VSX enabled there. In exactly that same way. GCC never generates anything MMA that the user did not explicitly ask for in the source code (with builtins, say), so this is not an issue. Compare this with hardware DFP. > The other change is that I should check for PPC_FEATURE2_HAS_IEEE128 for > power9, and add a comment that ALTIVEC and VSX are implied by the place > in the source tree (I deliberately made all this specific to > powerpc64le-*-linux-gnu on the glibc side, like we didn't define new ABI > levels for i386). All the VMX, VSX, QP float, MMA, whatever stuff is all the same on *all* GCC Power targets, not just those that are powerpc64le-linux. If you use -mcpu=whatever, the resulting program can only be run on CPUs with all features that has. This is what -mcpu= means. Segher