From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id CE4163857004 for ; Fri, 18 Dec 2020 19:30:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org CE4163857004 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 53683106F; Fri, 18 Dec 2020 11:30:11 -0800 (PST) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5B6AB3F66E; Fri, 18 Dec 2020 11:30:10 -0800 (PST) From: Richard Earnshaw To: libc-alpha@sourceware.org Cc: Richard Earnshaw , dj@redhat.com, szabolcs.nagy@arm.com Subject: [PATCH v4 2/6] elf: Add a tunable to control use of tagged memory Date: Fri, 18 Dec 2020 19:29:53 +0000 Message-Id: <20201218192957.11035-3-rearnsha@arm.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201218192957.11035-1-rearnsha@arm.com> References: <20201218192957.11035-1-rearnsha@arm.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.29.2" Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-13.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Dec 2020 19:30:13 -0000 This is a multi-part message in MIME format. --------------2.29.2 Content-Type: text/plain; charset=UTF-8; format=fixed Content-Transfer-Encoding: 8bit Add a new glibc tunable: mem.tagging. This is a decimal constant in the range 0-255 but used as a bit-field. Bit 0 enables use of tagged memory in the malloc family of functions. Bit 1 enables precise faulting of tag failure on platforms where this can be controlled. Other bits are currently unused, but if set will cause memory tag checking for the current process to be enabled in the kernel. --- elf/dl-tunables.list | 9 +++++++++ manual/tunables.texi | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) --------------2.29.2 Content-Type: text/x-patch; name="v4-0002-elf-Add-a-tunable-to-control-use-of-tagged-memory.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename="v4-0002-elf-Add-a-tunable-to-control-use-of-tagged-memory.patch" diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list index e1d8225128..4c44ead715 100644 --- a/elf/dl-tunables.list +++ b/elf/dl-tunables.list @@ -141,4 +141,13 @@ glibc { default: 512 } } + + mem { + tagging { + type: INT_32 + minval: 0 + maxval: 255 + security_level: SXID_IGNORE + } + } } diff --git a/manual/tunables.texi b/manual/tunables.texi index d72d7a5ec0..1bbdc88281 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -36,6 +36,8 @@ their own namespace. * POSIX Thread Tunables:: Tunables in the POSIX thread subsystem * Hardware Capability Tunables:: Tunables that modify the hardware capabilities seen by @theglibc{} +* Memory Related Tunables:: Tunables that control the use of memory by + @theglibc{}. @end menu @node Tunable names @@ -484,3 +486,36 @@ instead. This tunable is specific to i386 and x86-64. @end deftp + +@node Memory Related Tunables +@section Memory Related Tunables +@cindex memory related tunables + +@deftp {Tunable namespace} glibc.mem +This tunable namespace supports operations that affect the way @theglibc{} +and the process manage memory. +@end deftp + +@deftp Tunable glibc.mem.tagging +If the hardware supports memory tagging, this tunable can be used to +control the way @theglibc{} uses this feature. At present this is only +supported on AArch64 systems with the MTE extention; it is ignored for +all other systems. + +This tunable takes a value between 0 and 255 and acts as a bitmask +that enables various capabilities. + +Bit 0 (the least significant bit) causes the malloc subsystem to allocate +tagged memory, with each allocation being assigned a random tag. + +Bit 1 enables precise faulting mode for tag violations on systems that +support deferred tag violation reporting. This may cause programs +to run more slowly. + +Other bits are currently reserved. + +@Theglibc{} startup code will automatically enable memory tagging +support in the kernel if this tunable has any non-zero value. + +The default value is @samp{0}, which disables all memory tagging. +@end deftp --------------2.29.2--