From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id 0D4613857817 for ; Wed, 10 Nov 2021 03:07:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0D4613857817 X-IronPort-AV: E=McAfee;i="6200,9189,10163"; a="232835469" X-IronPort-AV: E=Sophos;i="5.87,222,1631602800"; d="scan'208";a="232835469" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Nov 2021 19:07:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,222,1631602800"; d="scan'208";a="500993190" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga007.fm.intel.com with ESMTP; 09 Nov 2021 19:07:26 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 1AA37QDW012817; Tue, 9 Nov 2021 19:07:26 -0800 From: Sunil K Pandey To: libc-alpha@sourceware.org Subject: [PATCH 0/6] Implement microbenchmark for libmvec Date: Tue, 9 Nov 2021 19:07:20 -0800 Message-Id: <20211110030726.2468302-1-skpgkp2@gmail.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, SPOOFED_FREEMAIL, SPOOF_GMAIL_MID, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Nov 2021 03:07:31 -0000 Implement microbenchmark for vector cos, cosf, exp, expf, log, logf, pow, powf, sin and sinf functions in libmvec with a python script to generate microbenchmark programs from the input values for each function using a skeleton benchmark template. Sunil K Pandey (6): x86-64: Create microbenchmark infrastructure for libmvec x86-64: Add cos/cosf to libmvec microbenchmark x86-64: Add exp/expf to libmvec microbenchmark x86-64: Add log/logf to libmvec microbenchmark x86-64: Add pow/powf to libmvec microbenchmark x86-64: Add sin/sinf to libmvec microbenchmark sysdeps/x86_64/fpu/Makeconfig | 40 + sysdeps/x86_64/fpu/Makefile | 40 + sysdeps/x86_64/fpu/bench-libmvec-skeleton.c | 105 + sysdeps/x86_64/fpu/libmvec-cos-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-cosf-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-expf-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-logf-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-pow-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-powf-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sin-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sinf-inputs | 4100 +++++++++++++++++++ sysdeps/x86_64/fpu/scripts/bench_libmvec.py | 464 +++ 14 files changed, 41649 insertions(+) create mode 100644 sysdeps/x86_64/fpu/bench-libmvec-skeleton.c create mode 100644 sysdeps/x86_64/fpu/libmvec-cos-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-cosf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-expf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-logf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-pow-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-powf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sin-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sinf-inputs create mode 100755 sysdeps/x86_64/fpu/scripts/bench_libmvec.py -- 2.31.1