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Clarke" To: "H.J. Lu" Cc: libc-alpha@sourceware.org, Florian Weimer , Oleh Derevenko , Arjan van de Ven , Andreas Schwab , Noah Goldstein Subject: Re: [PATCH v5 0/3] Optimize CAS [BZ #28537] Message-ID: <20211110202345.GG4930@li-24c3614c-2adc-11b2-a85c-85f334518bdb.ibm.com> References: <20211110184153.2269857-1-hjl.tools@gmail.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211110184153.2269857-1-hjl.tools@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-TM-AS-GCONF: 00 X-Proofpoint-GUID: UL77xUiwFR3xcuFuoKi7U06wDx9NL3Gz X-Proofpoint-ORIG-GUID: lYnCrvHYUjClYRAYWC9gZ_yQMIqnXvGS X-Proofpoint-UnRewURL: 1 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-10_12,2021-11-08_02,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 clxscore=1015 malwarescore=0 mlxscore=0 spamscore=0 bulkscore=0 phishscore=0 suspectscore=0 impostorscore=0 mlxlogscore=700 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2111100097 X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Nov 2021 20:24:03 -0000 On Wed, Nov 10, 2021 at 10:41:50AM -0800, H.J. Lu wrote: > Changes in v5: > > 1. Put back __glibc_unlikely in __lll_trylock and lll_cond_trylock. > 2. Remove an atomic load in a CAS usage which has been already optimized. > 3. Add an empty statement with a semicolon to a goto label for older > compiler versions. > 4. Simplify CAS optimization. > > CAS instruction is expensive. From the x86 CPU's point of view, getting > a cache line for writing is more expensive than reading. See Appendix > A.2 Spinlock in: > > https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/xeon-lock-scaling-analysis-paper.pdf > > The full compare and swap will grab the cache line exclusive and cause > excessive cache line bouncing. > > Optimize CAS in low level locks and pthread_mutex_lock.c: > > 1. Do an atomic load and skip CAS if compare may fail to reduce cache > line bouncing on contended locks. > 2. Replace atomic_compare_and_exchange_bool_acq with > atomic_compare_and_exchange_val_acq to avoid the extra load. > > This is the first patch set to optimize CAS. I will submit the rest > CAS optimizations in glibc after this patch set has been accepted. > > With all CAS optimizations applied, on a machine with 112 cores, > "make check -j28" under heavy load took > > 3093.18user 1644.12system 22:26.05elapsed 351%CPU > > vs without CAS optimizations > > 3746.07user 1614.93system 22:02.91elapsed 405%CPU I read that as about 2% slower with your changes. Is that the desired result? PC