From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id 0A22A3857C4B for ; Fri, 12 Nov 2021 19:18:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0A22A3857C4B X-IronPort-AV: E=McAfee;i="6200,9189,10166"; a="220081040" X-IronPort-AV: E=Sophos;i="5.87,230,1631602800"; d="scan'208";a="220081040" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2021 11:18:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,230,1631602800"; d="scan'208";a="733917147" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga005.fm.intel.com with ESMTP; 12 Nov 2021 11:18:00 -0800 Received: from gskx-1.sc.intel.com (gskx-1.sc.intel.com [172.25.149.211]) by scymds01.sc.intel.com with ESMTP id 1ACJI0BF000410; Fri, 12 Nov 2021 11:18:00 -0800 From: Sunil K Pandey To: libc-alpha@sourceware.org Subject: [PATCH v2 0/6] Implement microbenchmark for libmvec Date: Fri, 12 Nov 2021 11:17:54 -0800 Message-Id: <20211112191800.790574-1-skpgkp2@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, HK_RANDOM_ENVFROM, HK_RANDOM_FROM, KAM_DMARC_NONE, KAM_DMARC_STATUS, NML_ADSP_CUSTOM_MED, SPF_HELO_NONE, SPF_SOFTFAIL, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Nov 2021 19:18:04 -0000 Implement microbenchmark for vector cos, cosf, exp, expf, log, logf, pow, powf, sin and sinf functions in libmvec with a python script to generate microbenchmark programs from the input values for each function using a skeleton benchmark template. Purpose of the libmvec microbenchmark test is to evaluate work path performance reliably, not to cover as much input range as possible. Sunil K Pandey (6): x86-64: Create microbenchmark infrastructure for libmvec x86-64: Add vector cos/cosf to libmvec microbenchmark x86-64: Add vector exp/expf to libmvec microbenchmark x86-64: Add vector log/logf to libmvec microbenchmark x86-64: Add vector pow/powf to libmvec microbenchmark x86-64: Add vector sin/sinf to libmvec microbenchmark sysdeps/x86_64/fpu/Makeconfig | 40 + sysdeps/x86_64/fpu/Makefile | 40 + sysdeps/x86_64/fpu/bench-libmvec-skeleton.c | 104 + sysdeps/x86_64/fpu/libmvec-cos-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-cosf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-exp-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-expf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-log-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-logf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-pow-inputs | 4106 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-powf-inputs | 4106 +++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sin-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/libmvec-sinf-inputs | 4100 ++++++++++++++++++ sysdeps/x86_64/fpu/scripts/bench_libmvec.py | 464 +++ 14 files changed, 41660 insertions(+) create mode 100644 sysdeps/x86_64/fpu/bench-libmvec-skeleton.c create mode 100644 sysdeps/x86_64/fpu/libmvec-cos-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-cosf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-exp-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-expf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-log-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-logf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-pow-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-powf-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sin-inputs create mode 100644 sysdeps/x86_64/fpu/libmvec-sinf-inputs create mode 100755 sysdeps/x86_64/fpu/scripts/bench_libmvec.py -- 2.31.1