From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by sourceware.org (Postfix) with ESMTPS id 06D323858423 for ; Mon, 6 Dec 2021 21:08:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 06D323858423 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 98D30CE13C6; Mon, 6 Dec 2021 21:08:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C94A6C341C1; Mon, 6 Dec 2021 21:08:13 +0000 (UTC) Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 8CFE25C1461; Mon, 6 Dec 2021 13:08:13 -0800 (PST) Date: Mon, 6 Dec 2021 13:08:13 -0800 From: "Paul E. McKenney" To: Florian Weimer Cc: "Paul E. McKenney via Libc-alpha" , Peter Zijlstra , Boqun Feng , Mathieu Desnoyers , linux-kernel Subject: Re: [PATCH 2/5] nptl: Add rseq registration Message-ID: <20211206210813.GF641268@paulmck-ThinkPad-P17-Gen-1> Reply-To: paulmck@kernel.org References: <9c58724d604e160ebda5f667331fa41416c0d12b.1638798186.git.fweimer@redhat.com> <1780152866.15126.1638809966443.JavaMail.zimbra@efficios.com> <871r2podt9.fsf@oldenburg.str.redhat.com> <1614144911.15213.1638816753026.JavaMail.zimbra@efficios.com> <87ilw1mu81.fsf@oldenburg.str.redhat.com> <20211206201122.GE641268@paulmck-ThinkPad-P17-Gen-1> <87k0ghlbsk.fsf@oldenburg.str.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87k0ghlbsk.fsf@oldenburg.str.redhat.com> X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Dec 2021 21:08:19 -0000 On Mon, Dec 06, 2021 at 09:26:51PM +0100, Florian Weimer wrote: > * Paul E. McKenney via Libc-alpha: > > >> The C memory model is broken and does not prevent out-of-thin-air > >> values. As far as I know, this breaks single-copy atomicity. In > >> practice, compilers will not exercise the latitude offered by the memory > >> model. volatile does not ensure absence of data races. > > > > Within the confines of the standard, agreed, use of the volatile keyword > > does not explicitly prevent data races. > > > > However, volatile accesses are (informally) defined to suffice for > > device-driver memory accesses that communicate with devices, whether via > > MMIO or DMA-style shared memory. The device-driver firmware is often > > written in C or C++. So doesn't this informal device-driver guarantee > > need to also do what is needed for userspace code that is communicating > > with kernel code? If not, why not? > > The informal guarantee is probably good enough here, too. However, the > actual accesses are behind macros, and those macros use either > non-volatile plain reads or inline assembler (which use > single-instruction naturally aligned reads). Agreed, a non-volatile plain read is quite dangerous in this context. Thanx, Paul