From: Sunil K Pandey <skpgkp2@gmail.com>
To: libc-alpha@sourceware.org
Subject: [PATCH 099/126] x86_64: Fix svml_s_log1pf8_core_avx2.S code formatting
Date: Mon, 7 Mar 2022 07:01:34 -0800 [thread overview]
Message-ID: <20220307150201.10590-100-skpgkp2@gmail.com> (raw)
In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com>
This commit contains following formatting changes
1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
between it and the first operand.
3. Instruction greater than 7 characters in length have a
space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
---
.../fpu/multiarch/svml_s_log1pf8_core_avx2.S | 391 +++++++++---------
1 file changed, 195 insertions(+), 196 deletions(-)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf8_core_avx2.S
index 9da828bce7..54d6a9a685 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf8_core_avx2.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log1pf8_core_avx2.S
@@ -19,7 +19,7 @@
/*
* ALGORITHM DESCRIPTION:
*
- * 1+x = 2^k*(xh + xl) is computed in high-low parts; xh in [1,2)
+ * 1+x = 2^k*(xh + xl) is computed in high-low parts; xh in [1, 2)
* Get short reciprocal approximation Rcp ~ 1/xh
* R = (Rcp*xh - 1.0) + Rcp*xl
* log1p(x) = k*log(2.0) - log(Rcp) + poly(R)
@@ -30,225 +30,224 @@
/* Offsets for data table __svml_slog1p_data_internal
*/
-#define SgnMask 0
-#define sOne 32
-#define sPoly 64
-#define iHiDelta 320
-#define iLoRange 352
-#define iBrkValue 384
-#define iOffExpoMask 416
-#define sLn2 448
+#define SgnMask 0
+#define sOne 32
+#define sPoly 64
+#define iHiDelta 320
+#define iLoRange 352
+#define iBrkValue 384
+#define iOffExpoMask 416
+#define sLn2 448
#include <sysdep.h>
- .text
- .section .text.avx2,"ax",@progbits
+ .section .text.avx2, "ax", @progbits
ENTRY(_ZGVdN8v_log1pf_avx2)
- pushq %rbp
- cfi_def_cfa_offset(16)
- movq %rsp, %rbp
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
- andq $-32, %rsp
- subq $96, %rsp
- vmovups sOne+__svml_slog1p_data_internal(%rip), %ymm2
-
-/* reduction: compute r,n */
- vmovups iBrkValue+__svml_slog1p_data_internal(%rip), %ymm13
- vmovups SgnMask+__svml_slog1p_data_internal(%rip), %ymm4
- vmovups iLoRange+__svml_slog1p_data_internal(%rip), %ymm8
- vmovaps %ymm0, %ymm3
-
-/* compute 1+x as high, low parts */
- vmaxps %ymm3, %ymm2, %ymm5
- vminps %ymm3, %ymm2, %ymm6
- vaddps %ymm6, %ymm5, %ymm10
- vpsubd %ymm13, %ymm10, %ymm11
-
-/* check argument value ranges */
- vpaddd iHiDelta+__svml_slog1p_data_internal(%rip), %ymm10, %ymm9
- vsubps %ymm10, %ymm5, %ymm7
- vpsrad $23, %ymm11, %ymm14
- vpand iOffExpoMask+__svml_slog1p_data_internal(%rip), %ymm11, %ymm12
- vpslld $23, %ymm14, %ymm15
- vcvtdq2ps %ymm14, %ymm0
- vpsubd %ymm15, %ymm2, %ymm14
- vandnps %ymm3, %ymm4, %ymm1
- vaddps %ymm7, %ymm6, %ymm4
- vpaddd %ymm13, %ymm12, %ymm6
- vmulps %ymm4, %ymm14, %ymm7
-
-/* polynomial evaluation */
- vsubps %ymm2, %ymm6, %ymm2
- vpcmpgtd %ymm9, %ymm8, %ymm5
- vmovups sPoly+224+__svml_slog1p_data_internal(%rip), %ymm8
- vaddps %ymm2, %ymm7, %ymm9
- vfmadd213ps sPoly+192+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vfmadd213ps sPoly+160+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vfmadd213ps sPoly+128+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vfmadd213ps sPoly+96+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vfmadd213ps sPoly+64+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vfmadd213ps sPoly+32+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vfmadd213ps sPoly+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
- vmulps %ymm8, %ymm9, %ymm10
- vfmadd213ps %ymm9, %ymm9, %ymm10
-
-/* final reconstruction */
- vfmadd132ps sLn2+__svml_slog1p_data_internal(%rip), %ymm10, %ymm0
-
-/* combine and get argument value range mask */
- vmovmskps %ymm5, %edx
- vorps %ymm1, %ymm0, %ymm0
- testl %edx, %edx
-
-/* Go to special inputs processing branch */
- jne L(SPECIAL_VALUES_BRANCH)
- # LOE rbx r12 r13 r14 r15 edx ymm0 ymm3
-
-/* Restore registers
- * and exit the function
- */
+ pushq %rbp
+ cfi_def_cfa_offset(16)
+ movq %rsp, %rbp
+ cfi_def_cfa(6, 16)
+ cfi_offset(6, -16)
+ andq $-32, %rsp
+ subq $96, %rsp
+ vmovups sOne+__svml_slog1p_data_internal(%rip), %ymm2
+
+ /* reduction: compute r, n */
+ vmovups iBrkValue+__svml_slog1p_data_internal(%rip), %ymm13
+ vmovups SgnMask+__svml_slog1p_data_internal(%rip), %ymm4
+ vmovups iLoRange+__svml_slog1p_data_internal(%rip), %ymm8
+ vmovaps %ymm0, %ymm3
+
+ /* compute 1+x as high, low parts */
+ vmaxps %ymm3, %ymm2, %ymm5
+ vminps %ymm3, %ymm2, %ymm6
+ vaddps %ymm6, %ymm5, %ymm10
+ vpsubd %ymm13, %ymm10, %ymm11
+
+ /* check argument value ranges */
+ vpaddd iHiDelta+__svml_slog1p_data_internal(%rip), %ymm10, %ymm9
+ vsubps %ymm10, %ymm5, %ymm7
+ vpsrad $23, %ymm11, %ymm14
+ vpand iOffExpoMask+__svml_slog1p_data_internal(%rip), %ymm11, %ymm12
+ vpslld $23, %ymm14, %ymm15
+ vcvtdq2ps %ymm14, %ymm0
+ vpsubd %ymm15, %ymm2, %ymm14
+ vandnps %ymm3, %ymm4, %ymm1
+ vaddps %ymm7, %ymm6, %ymm4
+ vpaddd %ymm13, %ymm12, %ymm6
+ vmulps %ymm4, %ymm14, %ymm7
+
+ /* polynomial evaluation */
+ vsubps %ymm2, %ymm6, %ymm2
+ vpcmpgtd %ymm9, %ymm8, %ymm5
+ vmovups sPoly+224+__svml_slog1p_data_internal(%rip), %ymm8
+ vaddps %ymm2, %ymm7, %ymm9
+ vfmadd213ps sPoly+192+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vfmadd213ps sPoly+160+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vfmadd213ps sPoly+128+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vfmadd213ps sPoly+96+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vfmadd213ps sPoly+64+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vfmadd213ps sPoly+32+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vfmadd213ps sPoly+__svml_slog1p_data_internal(%rip), %ymm9, %ymm8
+ vmulps %ymm8, %ymm9, %ymm10
+ vfmadd213ps %ymm9, %ymm9, %ymm10
+
+ /* final reconstruction */
+ vfmadd132ps sLn2+__svml_slog1p_data_internal(%rip), %ymm10, %ymm0
+
+ /* combine and get argument value range mask */
+ vmovmskps %ymm5, %edx
+ vorps %ymm1, %ymm0, %ymm0
+ testl %edx, %edx
+
+ /* Go to special inputs processing branch */
+ jne L(SPECIAL_VALUES_BRANCH)
+ # LOE rbx r12 r13 r14 r15 edx ymm0 ymm3
+
+ /* Restore registers
+ * and exit the function
+ */
L(EXIT):
- movq %rbp, %rsp
- popq %rbp
- cfi_def_cfa(7, 8)
- cfi_restore(6)
- ret
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
-
-/* Branch to process
- * special inputs
- */
+ movq %rbp, %rsp
+ popq %rbp
+ cfi_def_cfa(7, 8)
+ cfi_restore(6)
+ ret
+ cfi_def_cfa(6, 16)
+ cfi_offset(6, -16)
+
+ /* Branch to process
+ * special inputs
+ */
L(SPECIAL_VALUES_BRANCH):
- vmovups %ymm3, 32(%rsp)
- vmovups %ymm0, 64(%rsp)
- # LOE rbx r12 r13 r14 r15 edx ymm0
-
- xorl %eax, %eax
- # LOE rbx r12 r13 r14 r15 eax edx
-
- vzeroupper
- movq %r12, 16(%rsp)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
- movl %eax, %r12d
- movq %r13, 8(%rsp)
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
- movl %edx, %r13d
- movq %r14, (%rsp)
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r15 r12d r13d
-
-/* Range mask
- * bits check
- */
+ vmovups %ymm3, 32(%rsp)
+ vmovups %ymm0, 64(%rsp)
+ # LOE rbx r12 r13 r14 r15 edx ymm0
+
+ xorl %eax, %eax
+ # LOE rbx r12 r13 r14 r15 eax edx
+
+ vzeroupper
+ movq %r12, 16(%rsp)
+ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
+ movl %eax, %r12d
+ movq %r13, 8(%rsp)
+ /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
+ movl %edx, %r13d
+ movq %r14, (%rsp)
+ /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+ # LOE rbx r15 r12d r13d
+
+ /* Range mask
+ * bits check
+ */
L(RANGEMASK_CHECK):
- btl %r12d, %r13d
+ btl %r12d, %r13d
-/* Call scalar math function */
- jc L(SCALAR_MATH_CALL)
- # LOE rbx r15 r12d r13d
+ /* Call scalar math function */
+ jc L(SCALAR_MATH_CALL)
+ # LOE rbx r15 r12d r13d
-/* Special inputs
- * processing loop
- */
+ /* Special inputs
+ * processing loop
+ */
L(SPECIAL_VALUES_LOOP):
- incl %r12d
- cmpl $8, %r12d
-
-/* Check bits in range mask */
- jl L(RANGEMASK_CHECK)
- # LOE rbx r15 r12d r13d
-
- movq 16(%rsp), %r12
- cfi_restore(12)
- movq 8(%rsp), %r13
- cfi_restore(13)
- movq (%rsp), %r14
- cfi_restore(14)
- vmovups 64(%rsp), %ymm0
-
-/* Go to exit */
- jmp L(EXIT)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r12 r13 r14 r15 ymm0
-
-/* Scalar math fucntion call
- * to process special input
- */
+ incl %r12d
+ cmpl $8, %r12d
+
+ /* Check bits in range mask */
+ jl L(RANGEMASK_CHECK)
+ # LOE rbx r15 r12d r13d
+
+ movq 16(%rsp), %r12
+ cfi_restore(12)
+ movq 8(%rsp), %r13
+ cfi_restore(13)
+ movq (%rsp), %r14
+ cfi_restore(14)
+ vmovups 64(%rsp), %ymm0
+
+ /* Go to exit */
+ jmp L(EXIT)
+ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -80; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xb0, 0xff, 0xff, 0xff, 0x22
+ /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -88; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa8, 0xff, 0xff, 0xff, 0x22
+ /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -32; DW_OP_and; DW_OP_const4s: -96; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xe0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0xa0, 0xff, 0xff, 0xff, 0x22
+ # LOE rbx r12 r13 r14 r15 ymm0
+
+ /* Scalar math fucntion call
+ * to process special input
+ */
L(SCALAR_MATH_CALL):
- movl %r12d, %r14d
- movss 32(%rsp,%r14,4), %xmm0
- call log1pf@PLT
- # LOE rbx r14 r15 r12d r13d xmm0
+ movl %r12d, %r14d
+ movss 32(%rsp, %r14, 4), %xmm0
+ call log1pf@PLT
+ # LOE rbx r14 r15 r12d r13d xmm0
- movss %xmm0, 64(%rsp,%r14,4)
+ movss %xmm0, 64(%rsp, %r14, 4)
-/* Process special inputs in loop */
- jmp L(SPECIAL_VALUES_LOOP)
- # LOE rbx r15 r12d r13d
+ /* Process special inputs in loop */
+ jmp L(SPECIAL_VALUES_LOOP)
+ # LOE rbx r15 r12d r13d
END(_ZGVdN8v_log1pf_avx2)
- .section .rodata, "a"
- .align 32
+ .section .rodata, "a"
+ .align 32
#ifdef __svml_slog1p_data_internal_typedef
typedef unsigned int VUINT32;
typedef struct {
- __declspec(align(32)) VUINT32 SgnMask[8][1];
- __declspec(align(32)) VUINT32 sOne[8][1];
- __declspec(align(32)) VUINT32 sPoly[8][8][1];
- __declspec(align(32)) VUINT32 iHiDelta[8][1];
- __declspec(align(32)) VUINT32 iLoRange[8][1];
- __declspec(align(32)) VUINT32 iBrkValue[8][1];
- __declspec(align(32)) VUINT32 iOffExpoMask[8][1];
- __declspec(align(32)) VUINT32 sLn2[8][1];
+ __declspec(align(32)) VUINT32 SgnMask[8][1];
+ __declspec(align(32)) VUINT32 sOne[8][1];
+ __declspec(align(32)) VUINT32 sPoly[8][8][1];
+ __declspec(align(32)) VUINT32 iHiDelta[8][1];
+ __declspec(align(32)) VUINT32 iLoRange[8][1];
+ __declspec(align(32)) VUINT32 iBrkValue[8][1];
+ __declspec(align(32)) VUINT32 iOffExpoMask[8][1];
+ __declspec(align(32)) VUINT32 sLn2[8][1];
} __svml_slog1p_data_internal;
#endif
__svml_slog1p_data_internal:
- /*== SgnMask ==*/
- .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff
- /*== sOne = SP 1.0 ==*/
- .align 32
- .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
- /*== sPoly[] = SP polynomial ==*/
- .align 32
- .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */
- .long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */
- .long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */
- .long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */
- .long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */
- .long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */
- .long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */
- .long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */
- /*== iHiDelta = SP 80000000-7f000000 ==*/
- .align 32
- .long 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000
- /*== iLoRange = SP 00800000+iHiDelta ==*/
- .align 32
- .long 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000
- /*== iBrkValue = SP 2/3 ==*/
- .align 32
- .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
- /*== iOffExpoMask = SP significand mask ==*/
- .align 32
- .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
- /*== sLn2 = SP ln(2) ==*/
- .align 32
- .long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218
- .align 32
- .type __svml_slog1p_data_internal,@object
- .size __svml_slog1p_data_internal,.-__svml_slog1p_data_internal
+ /* SgnMask */
+ .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff
+ /* sOne = SP 1.0 */
+ .align 32
+ .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
+ /* sPoly[] = SP polynomial */
+ .align 32
+ .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000 /* -5.0000000000000000000000000e-01 P0 */
+ .long 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94, 0x3eaaaa94 /* 3.3333265781402587890625000e-01 P1 */
+ .long 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e, 0xbe80058e /* -2.5004237890243530273437500e-01 P2 */
+ .long 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190, 0x3e4ce190 /* 2.0007920265197753906250000e-01 P3 */
+ .long 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37, 0xbe28ad37 /* -1.6472326219081878662109375e-01 P4 */
+ .long 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12, 0x3e0fcb12 /* 1.4042308926582336425781250e-01 P5 */
+ .long 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3, 0xbe1ad9e3 /* -1.5122179687023162841796875e-01 P6 */
+ .long 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed, 0x3e0d84ed /* 1.3820238411426544189453125e-01 P7 */
+ /* iHiDelta = SP 80000000-7f000000 */
+ .align 32
+ .long 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000
+ /* iLoRange = SP 00800000+iHiDelta */
+ .align 32
+ .long 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000, 0x01800000
+ /* iBrkValue = SP 2/3 */
+ .align 32
+ .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
+ /* iOffExpoMask = SP significand mask */
+ .align 32
+ .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
+ /* sLn2 = SP ln(2) */
+ .align 32
+ .long 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218, 0x3f317218
+ .align 32
+ .type __svml_slog1p_data_internal, @object
+ .size __svml_slog1p_data_internal, .-__svml_slog1p_data_internal
--
2.34.1
next prev parent reply other threads:[~2022-03-07 15:02 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 14:59 [PATCH 000/126] x86_64: Fix libmvec assembly " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 001/126] x86_64: Fix svml_s_acosf16_core_avx512.S " Sunil K Pandey
2022-03-07 21:50 ` Sunil Pandey
2022-03-07 22:52 ` Noah Goldstein
2022-03-07 14:59 ` [PATCH 002/126] x86_64: Fix svml_s_acosf4_core_sse4.S " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 003/126] x86_64: Fix svml_s_acosf8_core_avx2.S " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 004/126] x86_64: Fix svml_d_acos2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 005/126] x86_64: Fix svml_d_acos4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 006/126] x86_64: Fix svml_d_acos8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 007/126] x86_64: Fix svml_s_acoshf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 008/126] x86_64: Fix svml_s_acoshf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 009/126] x86_64: Fix svml_s_acoshf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 010/126] x86_64: Fix svml_d_acosh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 011/126] x86_64: Fix svml_d_acosh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 012/126] x86_64: Fix svml_d_acosh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 013/126] x86_64: Fix svml_s_asinf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 014/126] x86_64: Fix svml_s_asinf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 015/126] x86_64: Fix svml_s_asinf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 016/126] x86_64: Fix svml_d_asin2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 017/126] x86_64: Fix svml_d_asin4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 018/126] x86_64: Fix svml_d_asin8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 019/126] x86_64: Fix svml_s_asinhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 020/126] x86_64: Fix svml_s_asinhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 021/126] x86_64: Fix svml_s_asinhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 022/126] x86_64: Fix svml_d_asinh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 023/126] x86_64: Fix svml_d_asinh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 024/126] x86_64: Fix svml_d_asinh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 025/126] x86_64: Fix svml_s_atanf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 026/126] x86_64: Fix svml_s_atanf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 027/126] x86_64: Fix svml_s_atanf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 028/126] x86_64: Fix svml_d_atan2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 029/126] x86_64: Fix svml_d_atan4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 030/126] x86_64: Fix svml_d_atan8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 031/126] x86_64: Fix svml_s_atan2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 032/126] x86_64: Fix svml_s_atan2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 033/126] x86_64: Fix svml_s_atan2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 034/126] x86_64: Fix svml_d_atan22_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 035/126] x86_64: Fix svml_d_atan24_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 036/126] x86_64: Fix svml_d_atan28_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 037/126] x86_64: Fix svml_s_atanhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 038/126] x86_64: Fix svml_s_atanhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 039/126] x86_64: Fix svml_s_atanhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 040/126] x86_64: Fix svml_d_atanh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 041/126] x86_64: Fix svml_d_atanh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 042/126] x86_64: Fix svml_d_atanh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 043/126] x86_64: Fix svml_s_cbrtf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 044/126] x86_64: Fix svml_s_cbrtf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 045/126] x86_64: Fix svml_s_cbrtf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 046/126] x86_64: Fix svml_d_cbrt2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 047/126] x86_64: Fix svml_d_cbrt4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 048/126] x86_64: Fix svml_d_cbrt8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 049/126] x86_64: Fix svml_s_coshf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 050/126] x86_64: Fix svml_s_coshf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 051/126] x86_64: Fix svml_s_coshf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 052/126] x86_64: Fix svml_d_cosh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 053/126] x86_64: Fix svml_d_cosh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 054/126] x86_64: Fix svml_d_cosh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 055/126] x86_64: Fix svml_s_erff16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 056/126] x86_64: Fix svml_s_erff4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 057/126] x86_64: Fix svml_s_erff8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 058/126] x86_64: Fix svml_d_erf2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 059/126] x86_64: Fix svml_d_erf4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 060/126] x86_64: Fix svml_d_erf8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 061/126] x86_64: Fix svml_s_erfcf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 062/126] x86_64: Fix svml_s_erfcf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 063/126] x86_64: Fix svml_s_erfcf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 064/126] x86_64: Fix svml_d_erfc2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 065/126] x86_64: Fix svml_d_erfc4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 066/126] x86_64: Fix svml_d_erfc8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 067/126] x86_64: Fix svml_s_exp10f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 068/126] x86_64: Fix svml_s_exp10f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 069/126] x86_64: Fix svml_s_exp10f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 070/126] x86_64: Fix svml_d_exp102_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 071/126] x86_64: Fix svml_d_exp104_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 072/126] x86_64: Fix svml_d_exp108_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 073/126] x86_64: Fix svml_s_exp2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 074/126] x86_64: Fix svml_s_exp2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 075/126] x86_64: Fix svml_s_exp2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 076/126] x86_64: Fix svml_d_exp22_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 077/126] x86_64: Fix svml_d_exp24_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 078/126] x86_64: Fix svml_d_exp28_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 079/126] x86_64: Fix svml_s_expm1f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 080/126] x86_64: Fix svml_s_expm1f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 081/126] x86_64: Fix svml_s_expm1f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 082/126] x86_64: Fix svml_d_expm12_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 083/126] x86_64: Fix svml_d_expm14_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 084/126] x86_64: Fix svml_d_expm18_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 085/126] x86_64: Fix svml_s_hypotf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 086/126] x86_64: Fix svml_s_hypotf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 087/126] x86_64: Fix svml_s_hypotf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 088/126] x86_64: Fix svml_d_hypot2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 089/126] x86_64: Fix svml_d_hypot4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 090/126] x86_64: Fix svml_d_hypot8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 091/126] x86_64: Fix svml_s_log10f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 092/126] x86_64: Fix svml_s_log10f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 093/126] x86_64: Fix svml_s_log10f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 094/126] x86_64: Fix svml_d_log102_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 095/126] x86_64: Fix svml_d_log104_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 096/126] x86_64: Fix svml_d_log108_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 097/126] x86_64: Fix svml_s_log1pf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 098/126] x86_64: Fix svml_s_log1pf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` Sunil K Pandey [this message]
2022-03-07 15:01 ` [PATCH 100/126] x86_64: Fix svml_d_log1p2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 101/126] x86_64: Fix svml_d_log1p4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 102/126] x86_64: Fix svml_d_log1p8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 103/126] x86_64: Fix svml_s_log2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 104/126] x86_64: Fix svml_s_log2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 105/126] x86_64: Fix svml_s_log2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 106/126] x86_64: Fix svml_d_log22_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 107/126] x86_64: Fix svml_d_log24_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 108/126] x86_64: Fix svml_d_log28_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 109/126] x86_64: Fix svml_s_sinhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 110/126] x86_64: Fix svml_s_sinhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 111/126] x86_64: Fix svml_s_sinhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 112/126] x86_64: Fix svml_d_sinh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 113/126] x86_64: Fix svml_d_sinh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 114/126] x86_64: Fix svml_d_sinh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 115/126] x86_64: Fix svml_s_tanf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 116/126] x86_64: Fix svml_s_tanf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 117/126] x86_64: Fix svml_s_tanf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 118/126] x86_64: Fix svml_d_tan2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 119/126] x86_64: Fix svml_d_tan4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 120/126] x86_64: Fix svml_d_tan8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 121/126] x86_64: Fix svml_s_tanhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 122/126] x86_64: Fix svml_s_tanhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 123/126] x86_64: Fix svml_s_tanhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 124/126] x86_64: Fix svml_d_tanh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:02 ` [PATCH 125/126] x86_64: Fix svml_d_tanh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:02 ` [PATCH 126/126] x86_64: Fix svml_d_tanh8_core_avx512.S " Sunil K Pandey
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