From: Sunil K Pandey <skpgkp2@gmail.com>
To: libc-alpha@sourceware.org
Subject: [PATCH 050/126] x86_64: Fix svml_s_coshf4_core_sse4.S code formatting
Date: Mon, 7 Mar 2022 07:00:45 -0800 [thread overview]
Message-ID: <20220307150201.10590-51-skpgkp2@gmail.com> (raw)
In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com>
This commit contains following formatting changes
1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
between it and the first operand.
3. Instruction greater than 7 characters in length have a
space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
---
.../fpu/multiarch/svml_s_coshf4_core_sse4.S | 484 +++++++++---------
1 file changed, 241 insertions(+), 243 deletions(-)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S
index 7812fe9345..5d0d3db893 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_coshf4_core_sse4.S
@@ -34,272 +34,270 @@
/* Offsets for data table __svml_scosh_data_internal
*/
-#define _sInvLn2 0
-#define _sLn2hi 16
-#define _sLn2lo 32
-#define _sSign 48
-#define _sShifter 64
-#define _iDomainRange 80
-#define _sPC1 96
-#define _sPC2 112
-#define _sPC3 128
-#define _sPC4 144
-#define _sPC5 160
-#define _sPC6 176
-#define _iHalf 192
+#define _sInvLn2 0
+#define _sLn2hi 16
+#define _sLn2lo 32
+#define _sSign 48
+#define _sShifter 64
+#define _iDomainRange 80
+#define _sPC1 96
+#define _sPC2 112
+#define _sPC3 128
+#define _sPC4 144
+#define _sPC5 160
+#define _sPC6 176
+#define _iHalf 192
#include <sysdep.h>
- .text
- .section .text.sse4,"ax",@progbits
+ .section .text.sse4, "ax", @progbits
ENTRY(_ZGVbN4v_coshf_sse4)
- subq $72, %rsp
- cfi_def_cfa_offset(80)
-
-/*
- * Implementation
- * Abs argument
- */
- movups _sSign+__svml_scosh_data_internal(%rip), %xmm1
-
-/*
- * Load argument
- * dM = x/log(2) + RShifter
- */
- movups _sInvLn2+__svml_scosh_data_internal(%rip), %xmm9
- andnps %xmm0, %xmm1
- mulps %xmm1, %xmm9
-
-/* Check for overflow\underflow */
- movaps %xmm1, %xmm3
- movups _sShifter+__svml_scosh_data_internal(%rip), %xmm4
- movups _sLn2hi+__svml_scosh_data_internal(%rip), %xmm5
- addps %xmm4, %xmm9
-
-/*
- * R
- * sN = sM - RShifter
- */
- movaps %xmm9, %xmm6
-
-/*
- * G1,G2 2^N,2^(-N)
- * iM now is an EXP(2^N)
- */
- pslld $23, %xmm9
- movups _sLn2lo+__svml_scosh_data_internal(%rip), %xmm7
- subps %xmm4, %xmm6
-
-/* sR = sX - sN*Log2_hi */
- mulps %xmm6, %xmm5
-
-/* sR = (sX - sN*Log2_hi) - sN*Log2_lo */
- mulps %xmm6, %xmm7
- movdqu _iDomainRange+__svml_scosh_data_internal(%rip), %xmm2
- pcmpgtd %xmm2, %xmm3
- pcmpeqd %xmm1, %xmm2
-
-/*
- * sinh(r) = r*((a1=1)+r^2*(a3+r^2*(a5+{v1 r^2*a7})))) = r + r*(r^2*(a3+r^2*(a5+r^2*a7))) ....
- * sSinh_r = (a3+r^2*a5)
- */
- movups _sPC5+__svml_scosh_data_internal(%rip), %xmm10
- por %xmm2, %xmm3
-
-/*
- * sinh(X) = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2)
- * sOut = (a4 +a6*sR2)
- */
- movups _sPC6+__svml_scosh_data_internal(%rip), %xmm11
- subps %xmm5, %xmm1
- movmskps %xmm3, %edx
- movdqu _iHalf+__svml_scosh_data_internal(%rip), %xmm8
- subps %xmm7, %xmm1
-
-/* sR2 = sR^2,shaffled */
- movaps %xmm1, %xmm13
- movdqa %xmm8, %xmm2
- mulps %xmm1, %xmm13
- paddd %xmm9, %xmm2
- mulps %xmm13, %xmm10
- psubd %xmm9, %xmm8
- mulps %xmm13, %xmm11
- addps _sPC3+__svml_scosh_data_internal(%rip), %xmm10
- addps _sPC4+__svml_scosh_data_internal(%rip), %xmm11
-
-/* sSinh_r = r^2*(a3+r^2*a5) */
- mulps %xmm13, %xmm10
-
-/* sOut = a2+sR2*(a4+a6*sR2) */
- mulps %xmm13, %xmm11
-
-/* sSinh_r = r + r*(r^2*(a3+r^2*a5)) */
- mulps %xmm1, %xmm10
- addps _sPC2+__svml_scosh_data_internal(%rip), %xmm11
- addps %xmm10, %xmm1
-
-/* sOut = sR2*(a2+sR2*(a4+a6*sR2) */
- mulps %xmm11, %xmm13
-
-/* sG1 = 2^(N-1)-2^(-N-1) */
- movdqa %xmm2, %xmm12
-
-/* sG2 = 2^(N-1)+2^(-N-1) */
- addps %xmm8, %xmm2
- subps %xmm8, %xmm12
-
-/* sOut = sG2*sR2*(a2+sR2*(a4+a6*sR2) */
- mulps %xmm2, %xmm13
-
-/* sOut = sG1*sinh(dR)+sG2*sR2*(a2+sR2*(a4+a6*sR2) */
- mulps %xmm1, %xmm12
- addps %xmm12, %xmm13
-
-/* sOut = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) */
- addps %xmm13, %xmm2
-
-/* Ret H */
- testl %edx, %edx
-
-/* Go to special inputs processing branch */
- jne L(SPECIAL_VALUES_BRANCH)
- # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm2
-
-/* Restore registers
- * and exit the function
- */
+ subq $72, %rsp
+ cfi_def_cfa_offset(80)
+
+ /*
+ * Implementation
+ * Abs argument
+ */
+ movups _sSign+__svml_scosh_data_internal(%rip), %xmm1
+
+ /*
+ * Load argument
+ * dM = x/log(2) + RShifter
+ */
+ movups _sInvLn2+__svml_scosh_data_internal(%rip), %xmm9
+ andnps %xmm0, %xmm1
+ mulps %xmm1, %xmm9
+
+ /* Check for overflow\underflow */
+ movaps %xmm1, %xmm3
+ movups _sShifter+__svml_scosh_data_internal(%rip), %xmm4
+ movups _sLn2hi+__svml_scosh_data_internal(%rip), %xmm5
+ addps %xmm4, %xmm9
+
+ /*
+ * R
+ * sN = sM - RShifter
+ */
+ movaps %xmm9, %xmm6
+
+ /*
+ * G1, G2 2^N, 2^(-N)
+ * iM now is an EXP(2^N)
+ */
+ pslld $23, %xmm9
+ movups _sLn2lo+__svml_scosh_data_internal(%rip), %xmm7
+ subps %xmm4, %xmm6
+
+ /* sR = sX - sN*Log2_hi */
+ mulps %xmm6, %xmm5
+
+ /* sR = (sX - sN*Log2_hi) - sN*Log2_lo */
+ mulps %xmm6, %xmm7
+ movdqu _iDomainRange+__svml_scosh_data_internal(%rip), %xmm2
+ pcmpgtd %xmm2, %xmm3
+ pcmpeqd %xmm1, %xmm2
+
+ /*
+ * sinh(r) = r*((a1=1)+r^2*(a3+r^2*(a5+{v1 r^2*a7})))) = r + r*(r^2*(a3+r^2*(a5+r^2*a7))) ....
+ * sSinh_r = (a3+r^2*a5)
+ */
+ movups _sPC5+__svml_scosh_data_internal(%rip), %xmm10
+ por %xmm2, %xmm3
+
+ /*
+ * sinh(X) = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2)
+ * sOut = (a4 +a6*sR2)
+ */
+ movups _sPC6+__svml_scosh_data_internal(%rip), %xmm11
+ subps %xmm5, %xmm1
+ movmskps %xmm3, %edx
+ movdqu _iHalf+__svml_scosh_data_internal(%rip), %xmm8
+ subps %xmm7, %xmm1
+
+ /* sR2 = sR^2, shaffled */
+ movaps %xmm1, %xmm13
+ movdqa %xmm8, %xmm2
+ mulps %xmm1, %xmm13
+ paddd %xmm9, %xmm2
+ mulps %xmm13, %xmm10
+ psubd %xmm9, %xmm8
+ mulps %xmm13, %xmm11
+ addps _sPC3+__svml_scosh_data_internal(%rip), %xmm10
+ addps _sPC4+__svml_scosh_data_internal(%rip), %xmm11
+
+ /* sSinh_r = r^2*(a3+r^2*a5) */
+ mulps %xmm13, %xmm10
+
+ /* sOut = a2+sR2*(a4+a6*sR2) */
+ mulps %xmm13, %xmm11
+
+ /* sSinh_r = r + r*(r^2*(a3+r^2*a5)) */
+ mulps %xmm1, %xmm10
+ addps _sPC2+__svml_scosh_data_internal(%rip), %xmm11
+ addps %xmm10, %xmm1
+
+ /* sOut = sR2*(a2+sR2*(a4+a6*sR2) */
+ mulps %xmm11, %xmm13
+
+ /* sG1 = 2^(N-1)-2^(-N-1) */
+ movdqa %xmm2, %xmm12
+
+ /* sG2 = 2^(N-1)+2^(-N-1) */
+ addps %xmm8, %xmm2
+ subps %xmm8, %xmm12
+
+ /* sOut = sG2*sR2*(a2+sR2*(a4+a6*sR2) */
+ mulps %xmm2, %xmm13
+
+ /* sOut = sG1*sinh(dR)+sG2*sR2*(a2+sR2*(a4+a6*sR2) */
+ mulps %xmm1, %xmm12
+ addps %xmm12, %xmm13
+
+ /* sOut = sG2 + sG1*sinh(dR) + sG2*sR2*(a2+sR2*(a4+a6*sR2) */
+ addps %xmm13, %xmm2
+
+ /* Ret H */
+ testl %edx, %edx
+
+ /* Go to special inputs processing branch */
+ jne L(SPECIAL_VALUES_BRANCH)
+ # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm2
+
+ /* Restore registers
+ * and exit the function
+ */
L(EXIT):
- movaps %xmm2, %xmm0
- addq $72, %rsp
- cfi_def_cfa_offset(8)
- ret
- cfi_def_cfa_offset(80)
-
-/* Branch to process
- * special inputs
- */
+ movaps %xmm2, %xmm0
+ addq $72, %rsp
+ cfi_def_cfa_offset(8)
+ ret
+ cfi_def_cfa_offset(80)
+
+ /* Branch to process
+ * special inputs
+ */
L(SPECIAL_VALUES_BRANCH):
- movups %xmm0, 32(%rsp)
- movups %xmm2, 48(%rsp)
- # LOE rbx rbp r12 r13 r14 r15 edx
-
- xorl %eax, %eax
- movq %r12, 16(%rsp)
- cfi_offset(12, -64)
- movl %eax, %r12d
- movq %r13, 8(%rsp)
- cfi_offset(13, -72)
- movl %edx, %r13d
- movq %r14, (%rsp)
- cfi_offset(14, -80)
- # LOE rbx rbp r15 r12d r13d
-
-/* Range mask
- * bits check
- */
+ movups %xmm0, 32(%rsp)
+ movups %xmm2, 48(%rsp)
+ # LOE rbx rbp r12 r13 r14 r15 edx
+
+ xorl %eax, %eax
+ movq %r12, 16(%rsp)
+ cfi_offset(12, -64)
+ movl %eax, %r12d
+ movq %r13, 8(%rsp)
+ cfi_offset(13, -72)
+ movl %edx, %r13d
+ movq %r14, (%rsp)
+ cfi_offset(14, -80)
+ # LOE rbx rbp r15 r12d r13d
+
+ /* Range mask
+ * bits check
+ */
L(RANGEMASK_CHECK):
- btl %r12d, %r13d
+ btl %r12d, %r13d
-/* Call scalar math function */
- jc L(SCALAR_MATH_CALL)
- # LOE rbx rbp r15 r12d r13d
+ /* Call scalar math function */
+ jc L(SCALAR_MATH_CALL)
+ # LOE rbx rbp r15 r12d r13d
-/* Special inputs
- * processing loop
- */
+ /* Special inputs
+ * processing loop
+ */
L(SPECIAL_VALUES_LOOP):
- incl %r12d
- cmpl $4, %r12d
-
-/* Check bits in range mask */
- jl L(RANGEMASK_CHECK)
- # LOE rbx rbp r15 r12d r13d
-
- movq 16(%rsp), %r12
- cfi_restore(12)
- movq 8(%rsp), %r13
- cfi_restore(13)
- movq (%rsp), %r14
- cfi_restore(14)
- movups 48(%rsp), %xmm2
-
-/* Go to exit */
- jmp L(EXIT)
- cfi_offset(12, -64)
- cfi_offset(13, -72)
- cfi_offset(14, -80)
- # LOE rbx rbp r12 r13 r14 r15 xmm2
-
-/* Scalar math fucntion call
- * to process special input
- */
+ incl %r12d
+ cmpl $4, %r12d
+
+ /* Check bits in range mask */
+ jl L(RANGEMASK_CHECK)
+ # LOE rbx rbp r15 r12d r13d
+
+ movq 16(%rsp), %r12
+ cfi_restore(12)
+ movq 8(%rsp), %r13
+ cfi_restore(13)
+ movq (%rsp), %r14
+ cfi_restore(14)
+ movups 48(%rsp), %xmm2
+
+ /* Go to exit */
+ jmp L(EXIT)
+ cfi_offset(12, -64)
+ cfi_offset(13, -72)
+ cfi_offset(14, -80)
+ # LOE rbx rbp r12 r13 r14 r15 xmm2
+
+ /* Scalar math fucntion call
+ * to process special input
+ */
L(SCALAR_MATH_CALL):
- movl %r12d, %r14d
- movss 32(%rsp,%r14,4), %xmm0
- call coshf@PLT
- # LOE rbx rbp r14 r15 r12d r13d xmm0
+ movl %r12d, %r14d
+ movss 32(%rsp, %r14, 4), %xmm0
+ call coshf@PLT
+ # LOE rbx rbp r14 r15 r12d r13d xmm0
- movss %xmm0, 48(%rsp,%r14,4)
+ movss %xmm0, 48(%rsp, %r14, 4)
-/* Process special inputs in loop */
- jmp L(SPECIAL_VALUES_LOOP)
- # LOE rbx rbp r15 r12d r13d
+ /* Process special inputs in loop */
+ jmp L(SPECIAL_VALUES_LOOP)
+ # LOE rbx rbp r15 r12d r13d
END(_ZGVbN4v_coshf_sse4)
- .section .rodata, "a"
- .align 16
+ .section .rodata, "a"
+ .align 16
#ifdef __svml_scosh_data_internal_typedef
typedef unsigned int VUINT32;
-typedef struct
-{
- __declspec(align(16)) VUINT32 _sInvLn2[4][1];
- __declspec(align(16)) VUINT32 _sLn2hi[4][1];
- __declspec(align(16)) VUINT32 _sLn2lo[4][1];
- __declspec(align(16)) VUINT32 _sSign[4][1];
- __declspec(align(16)) VUINT32 _sShifter[4][1];
- __declspec(align(16)) VUINT32 _iDomainRange[4][1];
- __declspec(align(16)) VUINT32 _sPC1[4][1];
- __declspec(align(16)) VUINT32 _sPC2[4][1];
- __declspec(align(16)) VUINT32 _sPC3[4][1];
- __declspec(align(16)) VUINT32 _sPC4[4][1];
- __declspec(align(16)) VUINT32 _sPC5[4][1];
- __declspec(align(16)) VUINT32 _sPC6[4][1];
- __declspec(align(16)) VUINT32 _iHalf[4][1];
+typedef struct {
+ __declspec(align(16)) VUINT32 _sInvLn2[4][1];
+ __declspec(align(16)) VUINT32 _sLn2hi[4][1];
+ __declspec(align(16)) VUINT32 _sLn2lo[4][1];
+ __declspec(align(16)) VUINT32 _sSign[4][1];
+ __declspec(align(16)) VUINT32 _sShifter[4][1];
+ __declspec(align(16)) VUINT32 _iDomainRange[4][1];
+ __declspec(align(16)) VUINT32 _sPC1[4][1];
+ __declspec(align(16)) VUINT32 _sPC2[4][1];
+ __declspec(align(16)) VUINT32 _sPC3[4][1];
+ __declspec(align(16)) VUINT32 _sPC4[4][1];
+ __declspec(align(16)) VUINT32 _sPC5[4][1];
+ __declspec(align(16)) VUINT32 _sPC6[4][1];
+ __declspec(align(16)) VUINT32 _iHalf[4][1];
} __svml_scosh_data_internal;
#endif
__svml_scosh_data_internal:
- .long 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B /* _sInvLn2 */ //k=0
- .align 16
- .long 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000 /* _sLn2hi */
- .align 16
- .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4 /* _sLn2lo */
- .align 16
- .long 0x80000000, 0x80000000, 0x80000000, 0x80000000 /* _sSign */
- .align 16
- .long 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000 /* _sShifter */
- .align 16
- .long 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E /* _iDomainRange */
- .align 16
- .long 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000 /* _sPC1=1 */
- .align 16
- .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _sPC2 */
- .align 16
- .long 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57 /* _sPC3 */
- .align 16
- .long 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72 /* _sPC4 */
- .align 16
- .long 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461 /* _sPC5 */
- .align 16
- .long 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3 /* _sPC6 */
- // Integer constants
- .align 16
- .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _iHalf*/
- .align 16
- .type __svml_scosh_data_internal,@object
- .size __svml_scosh_data_internal,.-__svml_scosh_data_internal
+ .long 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B, 0x3FB8AA3B /* _sInvLn2 */ // k=0
+ .align 16
+ .long 0x3F317000, 0x3F317000, 0x3F317000, 0x3F317000 /* _sLn2hi */
+ .align 16
+ .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4 /* _sLn2lo */
+ .align 16
+ .long 0x80000000, 0x80000000, 0x80000000, 0x80000000 /* _sSign */
+ .align 16
+ .long 0x4b400000, 0x4b400000, 0x4b400000, 0x4b400000 /* _sShifter */
+ .align 16
+ .long 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E, 0x42AEAC4E /* _iDomainRange */
+ .align 16
+ .long 0x3F800000, 0x3F800000, 0x3F800000, 0x3F800000 /* _sPC1=1 */
+ .align 16
+ .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _sPC2 */
+ .align 16
+ .long 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57, 0x3e2aaa57 /* _sPC3 */
+ .align 16
+ .long 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72, 0x3d2aaa72 /* _sPC4 */
+ .align 16
+ .long 0x3c091461, 0x3c091461, 0x3c091461, 0x3c091461 /* _sPC5 */
+ .align 16
+ .long 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3, 0x3ab6a8a3 /* _sPC6 */
+ // Integer constants
+ .align 16
+ .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000 /* _iHalf */
+ .align 16
+ .type __svml_scosh_data_internal, @object
+ .size __svml_scosh_data_internal, .-__svml_scosh_data_internal
--
2.34.1
next prev parent reply other threads:[~2022-03-07 15:03 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 14:59 [PATCH 000/126] x86_64: Fix libmvec assembly " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 001/126] x86_64: Fix svml_s_acosf16_core_avx512.S " Sunil K Pandey
2022-03-07 21:50 ` Sunil Pandey
2022-03-07 22:52 ` Noah Goldstein
2022-03-07 14:59 ` [PATCH 002/126] x86_64: Fix svml_s_acosf4_core_sse4.S " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 003/126] x86_64: Fix svml_s_acosf8_core_avx2.S " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 004/126] x86_64: Fix svml_d_acos2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 005/126] x86_64: Fix svml_d_acos4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 006/126] x86_64: Fix svml_d_acos8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 007/126] x86_64: Fix svml_s_acoshf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 008/126] x86_64: Fix svml_s_acoshf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 009/126] x86_64: Fix svml_s_acoshf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 010/126] x86_64: Fix svml_d_acosh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 011/126] x86_64: Fix svml_d_acosh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 012/126] x86_64: Fix svml_d_acosh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 013/126] x86_64: Fix svml_s_asinf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 014/126] x86_64: Fix svml_s_asinf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 015/126] x86_64: Fix svml_s_asinf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 016/126] x86_64: Fix svml_d_asin2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 017/126] x86_64: Fix svml_d_asin4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 018/126] x86_64: Fix svml_d_asin8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 019/126] x86_64: Fix svml_s_asinhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 020/126] x86_64: Fix svml_s_asinhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 021/126] x86_64: Fix svml_s_asinhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 022/126] x86_64: Fix svml_d_asinh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 023/126] x86_64: Fix svml_d_asinh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 024/126] x86_64: Fix svml_d_asinh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 025/126] x86_64: Fix svml_s_atanf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 026/126] x86_64: Fix svml_s_atanf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 027/126] x86_64: Fix svml_s_atanf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 028/126] x86_64: Fix svml_d_atan2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 029/126] x86_64: Fix svml_d_atan4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 030/126] x86_64: Fix svml_d_atan8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 031/126] x86_64: Fix svml_s_atan2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 032/126] x86_64: Fix svml_s_atan2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 033/126] x86_64: Fix svml_s_atan2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 034/126] x86_64: Fix svml_d_atan22_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 035/126] x86_64: Fix svml_d_atan24_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 036/126] x86_64: Fix svml_d_atan28_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 037/126] x86_64: Fix svml_s_atanhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 038/126] x86_64: Fix svml_s_atanhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 039/126] x86_64: Fix svml_s_atanhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 040/126] x86_64: Fix svml_d_atanh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 041/126] x86_64: Fix svml_d_atanh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 042/126] x86_64: Fix svml_d_atanh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 043/126] x86_64: Fix svml_s_cbrtf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 044/126] x86_64: Fix svml_s_cbrtf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 045/126] x86_64: Fix svml_s_cbrtf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 046/126] x86_64: Fix svml_d_cbrt2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 047/126] x86_64: Fix svml_d_cbrt4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 048/126] x86_64: Fix svml_d_cbrt8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 049/126] x86_64: Fix svml_s_coshf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` Sunil K Pandey [this message]
2022-03-07 15:00 ` [PATCH 051/126] x86_64: Fix svml_s_coshf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 052/126] x86_64: Fix svml_d_cosh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 053/126] x86_64: Fix svml_d_cosh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 054/126] x86_64: Fix svml_d_cosh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 055/126] x86_64: Fix svml_s_erff16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 056/126] x86_64: Fix svml_s_erff4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 057/126] x86_64: Fix svml_s_erff8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 058/126] x86_64: Fix svml_d_erf2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 059/126] x86_64: Fix svml_d_erf4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 060/126] x86_64: Fix svml_d_erf8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 061/126] x86_64: Fix svml_s_erfcf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 062/126] x86_64: Fix svml_s_erfcf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 063/126] x86_64: Fix svml_s_erfcf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 064/126] x86_64: Fix svml_d_erfc2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 065/126] x86_64: Fix svml_d_erfc4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 066/126] x86_64: Fix svml_d_erfc8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 067/126] x86_64: Fix svml_s_exp10f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 068/126] x86_64: Fix svml_s_exp10f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 069/126] x86_64: Fix svml_s_exp10f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 070/126] x86_64: Fix svml_d_exp102_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 071/126] x86_64: Fix svml_d_exp104_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 072/126] x86_64: Fix svml_d_exp108_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 073/126] x86_64: Fix svml_s_exp2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 074/126] x86_64: Fix svml_s_exp2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 075/126] x86_64: Fix svml_s_exp2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 076/126] x86_64: Fix svml_d_exp22_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 077/126] x86_64: Fix svml_d_exp24_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 078/126] x86_64: Fix svml_d_exp28_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 079/126] x86_64: Fix svml_s_expm1f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 080/126] x86_64: Fix svml_s_expm1f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 081/126] x86_64: Fix svml_s_expm1f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 082/126] x86_64: Fix svml_d_expm12_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 083/126] x86_64: Fix svml_d_expm14_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 084/126] x86_64: Fix svml_d_expm18_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 085/126] x86_64: Fix svml_s_hypotf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 086/126] x86_64: Fix svml_s_hypotf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 087/126] x86_64: Fix svml_s_hypotf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 088/126] x86_64: Fix svml_d_hypot2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 089/126] x86_64: Fix svml_d_hypot4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 090/126] x86_64: Fix svml_d_hypot8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 091/126] x86_64: Fix svml_s_log10f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 092/126] x86_64: Fix svml_s_log10f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 093/126] x86_64: Fix svml_s_log10f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 094/126] x86_64: Fix svml_d_log102_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 095/126] x86_64: Fix svml_d_log104_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 096/126] x86_64: Fix svml_d_log108_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 097/126] x86_64: Fix svml_s_log1pf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 098/126] x86_64: Fix svml_s_log1pf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 099/126] x86_64: Fix svml_s_log1pf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 100/126] x86_64: Fix svml_d_log1p2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 101/126] x86_64: Fix svml_d_log1p4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 102/126] x86_64: Fix svml_d_log1p8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 103/126] x86_64: Fix svml_s_log2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 104/126] x86_64: Fix svml_s_log2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 105/126] x86_64: Fix svml_s_log2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 106/126] x86_64: Fix svml_d_log22_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 107/126] x86_64: Fix svml_d_log24_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 108/126] x86_64: Fix svml_d_log28_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 109/126] x86_64: Fix svml_s_sinhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 110/126] x86_64: Fix svml_s_sinhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 111/126] x86_64: Fix svml_s_sinhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 112/126] x86_64: Fix svml_d_sinh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 113/126] x86_64: Fix svml_d_sinh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 114/126] x86_64: Fix svml_d_sinh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 115/126] x86_64: Fix svml_s_tanf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 116/126] x86_64: Fix svml_s_tanf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 117/126] x86_64: Fix svml_s_tanf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 118/126] x86_64: Fix svml_d_tan2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 119/126] x86_64: Fix svml_d_tan4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 120/126] x86_64: Fix svml_d_tan8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 121/126] x86_64: Fix svml_s_tanhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 122/126] x86_64: Fix svml_s_tanhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 123/126] x86_64: Fix svml_s_tanhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 124/126] x86_64: Fix svml_d_tanh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:02 ` [PATCH 125/126] x86_64: Fix svml_d_tanh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:02 ` [PATCH 126/126] x86_64: Fix svml_d_tanh8_core_avx512.S " Sunil K Pandey
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