From: Sunil K Pandey <skpgkp2@gmail.com>
To: libc-alpha@sourceware.org
Subject: [PATCH 007/126] x86_64: Fix svml_s_acoshf16_core_avx512.S code formatting
Date: Mon, 7 Mar 2022 07:00:02 -0800 [thread overview]
Message-ID: <20220307150201.10590-8-skpgkp2@gmail.com> (raw)
In-Reply-To: <20220307150201.10590-1-skpgkp2@gmail.com>
This commit contains following formatting changes
1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
between it and the first operand.
3. Instruction greater than 7 characters in length have a
space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
---
.../multiarch/svml_s_acoshf16_core_avx512.S | 743 +++++++++---------
1 file changed, 371 insertions(+), 372 deletions(-)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_acoshf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_acoshf16_core_avx512.S
index 0ae0e89116..3f44e75248 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_acoshf16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_acoshf16_core_avx512.S
@@ -36,414 +36,413 @@
/* Offsets for data table __svml_sacosh_data_internal_avx512
*/
-#define Log_tbl_H 0
-#define Log_tbl_L 128
-#define One 256
-#define SmallThreshold 320
-#define Threshold 384
-#define LargeThreshold 448
-#define ca1 512
-#define c2s 576
-#define c1s 640
-#define AddB5 704
-#define RcpBitMask 768
-#define OneEighth 832
-#define Four 896
-#define poly_coeff3 960
-#define poly_coeff2 1024
-#define poly_coeff1 1088
-#define L2H 1152
-#define L2L 1216
+#define Log_tbl_H 0
+#define Log_tbl_L 128
+#define One 256
+#define SmallThreshold 320
+#define Threshold 384
+#define LargeThreshold 448
+#define ca1 512
+#define c2s 576
+#define c1s 640
+#define AddB5 704
+#define RcpBitMask 768
+#define OneEighth 832
+#define Four 896
+#define poly_coeff3 960
+#define poly_coeff2 1024
+#define poly_coeff1 1088
+#define L2H 1152
+#define L2L 1216
#include <sysdep.h>
- .text
- .section .text.exex512,"ax",@progbits
+ .section .text.exex512, "ax", @progbits
ENTRY(_ZGVeN16v_acoshf_skx)
- pushq %rbp
- cfi_def_cfa_offset(16)
- movq %rsp, %rbp
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
- andq $-64, %rsp
- subq $192, %rsp
- vmovups One+__svml_sacosh_data_internal_avx512(%rip), %zmm1
+ pushq %rbp
+ cfi_def_cfa_offset(16)
+ movq %rsp, %rbp
+ cfi_def_cfa(6, 16)
+ cfi_offset(6, -16)
+ andq $-64, %rsp
+ subq $192, %rsp
+ vmovups One+__svml_sacosh_data_internal_avx512(%rip), %zmm1
-/*
- * sqrt(1+x^2) ~ Sh + Sl + Sh*Eh*poly_s
- * poly_s = c1+c2*Eh
- */
- vmovups c2s+__svml_sacosh_data_internal_avx512(%rip), %zmm13
- vmovups c1s+__svml_sacosh_data_internal_avx512(%rip), %zmm15
-
-/* polynomial computation for small inputs */
- vmovups ca1+__svml_sacosh_data_internal_avx512(%rip), %zmm9
-
-/* very large inputs ? */
- vmovups Threshold+__svml_sacosh_data_internal_avx512(%rip), %zmm10
-
-/* out of range inputs? */
- vmovups LargeThreshold+__svml_sacosh_data_internal_avx512(%rip), %zmm11
-
-/* not a very small input ? */
- vmovups SmallThreshold+__svml_sacosh_data_internal_avx512(%rip), %zmm6
- vmovaps %zmm0, %zmm8
-
-/* x^2 - 1 */
- vmovaps %zmm1, %zmm7
- vfmsub231ps {rn-sae}, %zmm8, %zmm8, %zmm7
- vcmpps $21, {sae}, %zmm10, %zmm8, %k2
- vcmpps $22, {sae}, %zmm11, %zmm8, %k0
- vcmpps $18, {sae}, %zmm1, %zmm8, %k1
- vrsqrt14ps %zmm7, %zmm12
- vcmpps $21, {sae}, %zmm6, %zmm7, %k3
- vmulps {rn-sae}, %zmm9, %zmm7, %zmm4
-
-/* Sh ~sqrt(-1+x^2) */
- vmulps {rn-sae}, %zmm12, %zmm7, %zmm5
-
-/* Sh+x */
- vaddps {rn-sae}, %zmm8, %zmm5, %zmm9
-
-/* (Yh*R0)_low */
- vmovaps %zmm7, %zmm0
- korw %k0, %k1, %k0
-
-/* rel. error term: Eh=1-Sh*R0 */
- vmovaps %zmm1, %zmm14
- vfmsub213ps {rn-sae}, %zmm5, %zmm12, %zmm0
- vfnmadd231ps {rn-sae}, %zmm5, %zmm12, %zmm14
-
-/* rel. error term: Eh=(1-Sh*R0)-Sl*R0 */
- vfnmadd231ps {rn-sae}, %zmm0, %zmm12, %zmm14
-
-/* Sh*Eh */
- vmulps {rn-sae}, %zmm14, %zmm5, %zmm3
- vfmadd231ps {rn-sae}, %zmm14, %zmm13, %zmm15
-
-/* Sl + Sh*Eh*poly_s */
- vfmadd213ps {rn-sae}, %zmm0, %zmm15, %zmm3
-
-/* Shh */
- vsubps {rn-sae}, %zmm8, %zmm9, %zmm15
+ /*
+ * sqrt(1+x^2) ~ Sh + Sl + Sh*Eh*poly_s
+ * poly_s = c1+c2*Eh
+ */
+ vmovups c2s+__svml_sacosh_data_internal_avx512(%rip), %zmm13
+ vmovups c1s+__svml_sacosh_data_internal_avx512(%rip), %zmm15
+
+ /* polynomial computation for small inputs */
+ vmovups ca1+__svml_sacosh_data_internal_avx512(%rip), %zmm9
-/* polynomial computation for small inputs */
- vaddps {rn-sae}, %zmm3, %zmm5, %zmm0
+ /* very large inputs ? */
+ vmovups Threshold+__svml_sacosh_data_internal_avx512(%rip), %zmm10
+
+ /* out of range inputs? */
+ vmovups LargeThreshold+__svml_sacosh_data_internal_avx512(%rip), %zmm11
+
+ /* not a very small input ? */
+ vmovups SmallThreshold+__svml_sacosh_data_internal_avx512(%rip), %zmm6
+ vmovaps %zmm0, %zmm8
+
+ /* x^2 - 1 */
+ vmovaps %zmm1, %zmm7
+ vfmsub231ps {rn-sae}, %zmm8, %zmm8, %zmm7
+ vcmpps $21, {sae}, %zmm10, %zmm8, %k2
+ vcmpps $22, {sae}, %zmm11, %zmm8, %k0
+ vcmpps $18, {sae}, %zmm1, %zmm8, %k1
+ vrsqrt14ps %zmm7, %zmm12
+ vcmpps $21, {sae}, %zmm6, %zmm7, %k3
+ vmulps {rn-sae}, %zmm9, %zmm7, %zmm4
+
+ /* Sh ~sqrt(-1+x^2) */
+ vmulps {rn-sae}, %zmm12, %zmm7, %zmm5
+
+ /* Sh+x */
+ vaddps {rn-sae}, %zmm8, %zmm5, %zmm9
+
+ /* (Yh*R0)_low */
+ vmovaps %zmm7, %zmm0
+ korw %k0, %k1, %k0
+
+ /* rel. error term: Eh=1-Sh*R0 */
+ vmovaps %zmm1, %zmm14
+ vfmsub213ps {rn-sae}, %zmm5, %zmm12, %zmm0
+ vfnmadd231ps {rn-sae}, %zmm5, %zmm12, %zmm14
+
+ /* rel. error term: Eh=(1-Sh*R0)-Sl*R0 */
+ vfnmadd231ps {rn-sae}, %zmm0, %zmm12, %zmm14
+
+ /* Sh*Eh */
+ vmulps {rn-sae}, %zmm14, %zmm5, %zmm3
+ vfmadd231ps {rn-sae}, %zmm14, %zmm13, %zmm15
+
+ /* Sl + Sh*Eh*poly_s */
+ vfmadd213ps {rn-sae}, %zmm0, %zmm15, %zmm3
+
+ /* Shh */
+ vsubps {rn-sae}, %zmm8, %zmm9, %zmm15
+
+ /* polynomial computation for small inputs */
+ vaddps {rn-sae}, %zmm3, %zmm5, %zmm0
+
+ /* Xin0+Sl+Sh*Eh*poly_s ~ x+sqrt(1+x^2) */
+ vaddps {rn-sae}, %zmm3, %zmm9, %zmm2
+
+ /* Shl */
+ vsubps {rn-sae}, %zmm15, %zmm5, %zmm10
+ vfmadd231ps {rn-sae}, %zmm0, %zmm4, %zmm0
+
+ /* fixup for very large inputs */
+ vmovups OneEighth+__svml_sacosh_data_internal_avx512(%rip), %zmm4
+
+ /* Sl_high */
+ vsubps {rn-sae}, %zmm9, %zmm2, %zmm5
+
+ /* polynomial */
+ vmovups poly_coeff3+__svml_sacosh_data_internal_avx512(%rip), %zmm9
+ vmulps {rn-sae}, %zmm4, %zmm8, %zmm2{%k2}
+
+ /* -K*L2L + Tl */
+ vmovups L2L+__svml_sacosh_data_internal_avx512(%rip), %zmm4
+
+ /* Sl_l */
+ vsubps {rn-sae}, %zmm5, %zmm3, %zmm3
+ vrcp14ps %zmm2, %zmm11
+ vmovups Log_tbl_L+__svml_sacosh_data_internal_avx512(%rip), %zmm5
+
+ /* Xin_low */
+ vaddps {rn-sae}, %zmm10, %zmm3, %zmm13
+
+ /* round reciprocal to 1+4b mantissas */
+ vpaddd AddB5+__svml_sacosh_data_internal_avx512(%rip), %zmm11, %zmm12
+ vmovups poly_coeff1+__svml_sacosh_data_internal_avx512(%rip), %zmm10
+ vandps RcpBitMask+__svml_sacosh_data_internal_avx512(%rip), %zmm12, %zmm14
-/* Xin0+Sl+Sh*Eh*poly_s ~ x+sqrt(1+x^2) */
- vaddps {rn-sae}, %zmm3, %zmm9, %zmm2
+ /* fixup for very large inputs */
+ vxorps %zmm13, %zmm13, %zmm13{%k2}
-/* Shl */
- vsubps {rn-sae}, %zmm15, %zmm5, %zmm10
- vfmadd231ps {rn-sae}, %zmm0, %zmm4, %zmm0
+ /* reduced argument for log(): (Rcp*Xin-1)+Rcp*Xin_low */
+ vfmsub231ps {rn-sae}, %zmm14, %zmm2, %zmm1
-/* fixup for very large inputs */
- vmovups OneEighth+__svml_sacosh_data_internal_avx512(%rip), %zmm4
+ /* exponents */
+ vgetexpps {sae}, %zmm14, %zmm12
+ vmovups Four+__svml_sacosh_data_internal_avx512(%rip), %zmm2
-/* Sl_high */
- vsubps {rn-sae}, %zmm9, %zmm2, %zmm5
+ /* Prepare table index */
+ vpsrld $18, %zmm14, %zmm3
+ vfmadd231ps {rn-sae}, %zmm14, %zmm13, %zmm1
+ vmovups poly_coeff2+__svml_sacosh_data_internal_avx512(%rip), %zmm13
-/* polynomial */
- vmovups poly_coeff3+__svml_sacosh_data_internal_avx512(%rip), %zmm9
- vmulps {rn-sae}, %zmm4, %zmm8, %zmm2{%k2}
+ /* Table lookups */
+ vmovups __svml_sacosh_data_internal_avx512(%rip), %zmm14
+ vsubps {rn-sae}, %zmm2, %zmm12, %zmm12{%k2}
+ vpermt2ps Log_tbl_L+64+__svml_sacosh_data_internal_avx512(%rip), %zmm3, %zmm5
+ vpermt2ps Log_tbl_H+64+__svml_sacosh_data_internal_avx512(%rip), %zmm3, %zmm14
-/* -K*L2L + Tl */
- vmovups L2L+__svml_sacosh_data_internal_avx512(%rip), %zmm4
+ /* R^2 */
+ vmulps {rn-sae}, %zmm1, %zmm1, %zmm11
-/* Sl_l */
- vsubps {rn-sae}, %zmm5, %zmm3, %zmm3
- vrcp14ps %zmm2, %zmm11
- vmovups Log_tbl_L+__svml_sacosh_data_internal_avx512(%rip), %zmm5
+ /* -K*L2H + Th */
+ vmovups L2H+__svml_sacosh_data_internal_avx512(%rip), %zmm2
+ vfmadd231ps {rn-sae}, %zmm1, %zmm9, %zmm13
+ vfnmadd231ps {rn-sae}, %zmm12, %zmm2, %zmm14
+ vfnmadd213ps {rn-sae}, %zmm5, %zmm4, %zmm12
+ vfmadd213ps {rn-sae}, %zmm10, %zmm1, %zmm13
-/* Xin_low */
- vaddps {rn-sae}, %zmm10, %zmm3, %zmm13
+ /* Tl + R^2*Poly */
+ vfmadd213ps {rn-sae}, %zmm12, %zmm11, %zmm13
-/* round reciprocal to 1+4b mantissas */
- vpaddd AddB5+__svml_sacosh_data_internal_avx512(%rip), %zmm11, %zmm12
- vmovups poly_coeff1+__svml_sacosh_data_internal_avx512(%rip), %zmm10
- vandps RcpBitMask+__svml_sacosh_data_internal_avx512(%rip), %zmm12, %zmm14
+ /* R+Tl + R^2*Poly */
+ vaddps {rn-sae}, %zmm1, %zmm13, %zmm1
+ vaddps {rn-sae}, %zmm1, %zmm14, %zmm0{%k3}
-/* fixup for very large inputs */
- vxorps %zmm13, %zmm13, %zmm13{%k2}
+ /* Go to special inputs processing branch */
+ jne L(SPECIAL_VALUES_BRANCH)
+ # LOE rbx r12 r13 r14 r15 k0 zmm0 zmm8
-/* reduced argument for log(): (Rcp*Xin-1)+Rcp*Xin_low */
- vfmsub231ps {rn-sae}, %zmm14, %zmm2, %zmm1
-
-/* exponents */
- vgetexpps {sae}, %zmm14, %zmm12
- vmovups Four+__svml_sacosh_data_internal_avx512(%rip), %zmm2
-
-/* Prepare table index */
- vpsrld $18, %zmm14, %zmm3
- vfmadd231ps {rn-sae}, %zmm14, %zmm13, %zmm1
- vmovups poly_coeff2+__svml_sacosh_data_internal_avx512(%rip), %zmm13
-
-/* Table lookups */
- vmovups __svml_sacosh_data_internal_avx512(%rip), %zmm14
- vsubps {rn-sae}, %zmm2, %zmm12, %zmm12{%k2}
- vpermt2ps Log_tbl_L+64+__svml_sacosh_data_internal_avx512(%rip), %zmm3, %zmm5
- vpermt2ps Log_tbl_H+64+__svml_sacosh_data_internal_avx512(%rip), %zmm3, %zmm14
-
-/* R^2 */
- vmulps {rn-sae}, %zmm1, %zmm1, %zmm11
-
-/* -K*L2H + Th */
- vmovups L2H+__svml_sacosh_data_internal_avx512(%rip), %zmm2
- vfmadd231ps {rn-sae}, %zmm1, %zmm9, %zmm13
- vfnmadd231ps {rn-sae}, %zmm12, %zmm2, %zmm14
- vfnmadd213ps {rn-sae}, %zmm5, %zmm4, %zmm12
- vfmadd213ps {rn-sae}, %zmm10, %zmm1, %zmm13
-
-/* Tl + R^2*Poly */
- vfmadd213ps {rn-sae}, %zmm12, %zmm11, %zmm13
-
-/* R+Tl + R^2*Poly */
- vaddps {rn-sae}, %zmm1, %zmm13, %zmm1
- vaddps {rn-sae}, %zmm1, %zmm14, %zmm0{%k3}
-
-/* Go to special inputs processing branch */
- jne L(SPECIAL_VALUES_BRANCH)
- # LOE rbx r12 r13 r14 r15 k0 zmm0 zmm8
-
-/* Restore registers
- * and exit the function
- */
+ /* Restore registers
+ * and exit the function
+ */
L(EXIT):
- movq %rbp, %rsp
- popq %rbp
- cfi_def_cfa(7, 8)
- cfi_restore(6)
- ret
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
-
-/* Branch to process
- * special inputs
- */
+ movq %rbp, %rsp
+ popq %rbp
+ cfi_def_cfa(7, 8)
+ cfi_restore(6)
+ ret
+ cfi_def_cfa(6, 16)
+ cfi_offset(6, -16)
+
+ /* Branch to process
+ * special inputs
+ */
L(SPECIAL_VALUES_BRANCH):
- vmovups %zmm8, 64(%rsp)
- vmovups %zmm0, 128(%rsp)
- # LOE rbx r12 r13 r14 r15 k0 zmm0
-
- xorl %eax, %eax
- # LOE rbx r12 r13 r14 r15 eax k0
-
- vzeroupper
- movq %r12, 16(%rsp)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
- movl %eax, %r12d
- movq %r13, 8(%rsp)
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
- kmovd %k0, %r13d
- movq %r14, (%rsp)
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r15 r12d r13d
-
-/* Range mask
- * bits check
- */
+ vmovups %zmm8, 64(%rsp)
+ vmovups %zmm0, 128(%rsp)
+ # LOE rbx r12 r13 r14 r15 k0 zmm0
+
+ xorl %eax, %eax
+ # LOE rbx r12 r13 r14 r15 eax k0
+
+ vzeroupper
+ movq %r12, 16(%rsp)
+ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+ movl %eax, %r12d
+ movq %r13, 8(%rsp)
+ /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+ kmovd %k0, %r13d
+ movq %r14, (%rsp)
+ /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+ # LOE rbx r15 r12d r13d
+
+ /* Range mask
+ * bits check
+ */
L(RANGEMASK_CHECK):
- btl %r12d, %r13d
+ btl %r12d, %r13d
-/* Call scalar math function */
- jc L(SCALAR_MATH_CALL)
- # LOE rbx r15 r12d r13d
+ /* Call scalar math function */
+ jc L(SCALAR_MATH_CALL)
+ # LOE rbx r15 r12d r13d
-/* Special inputs
- * processing loop
- */
+ /* Special inputs
+ * processing loop
+ */
L(SPECIAL_VALUES_LOOP):
- incl %r12d
- cmpl $16, %r12d
-
-/* Check bits in range mask */
- jl L(RANGEMASK_CHECK)
- # LOE rbx r15 r12d r13d
-
- movq 16(%rsp), %r12
- cfi_restore(12)
- movq 8(%rsp), %r13
- cfi_restore(13)
- movq (%rsp), %r14
- cfi_restore(14)
- vmovups 128(%rsp), %zmm0
-
-/* Go to exit */
- jmp L(EXIT)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r12 r13 r14 r15 zmm0
-
-/* Scalar math fucntion call
- * to process special input
- */
+ incl %r12d
+ cmpl $16, %r12d
+
+ /* Check bits in range mask */
+ jl L(RANGEMASK_CHECK)
+ # LOE rbx r15 r12d r13d
+
+ movq 16(%rsp), %r12
+ cfi_restore(12)
+ movq 8(%rsp), %r13
+ cfi_restore(13)
+ movq (%rsp), %r14
+ cfi_restore(14)
+ vmovups 128(%rsp), %zmm0
+
+ /* Go to exit */
+ jmp L(EXIT)
+ /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
+ /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
+ /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
+ .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
+ # LOE rbx r12 r13 r14 r15 zmm0
+
+ /* Scalar math fucntion call
+ * to process special input
+ */
L(SCALAR_MATH_CALL):
- movl %r12d, %r14d
- movss 64(%rsp,%r14,4), %xmm0
- call acoshf@PLT
- # LOE rbx r14 r15 r12d r13d xmm0
+ movl %r12d, %r14d
+ movss 64(%rsp, %r14, 4), %xmm0
+ call acoshf@PLT
+ # LOE rbx r14 r15 r12d r13d xmm0
- movss %xmm0, 128(%rsp,%r14,4)
+ movss %xmm0, 128(%rsp, %r14, 4)
-/* Process special inputs in loop */
- jmp L(SPECIAL_VALUES_LOOP)
- # LOE rbx r15 r12d r13d
+ /* Process special inputs in loop */
+ jmp L(SPECIAL_VALUES_LOOP)
+ # LOE rbx r15 r12d r13d
END(_ZGVeN16v_acoshf_skx)
- .section .rodata, "a"
- .align 64
+ .section .rodata, "a"
+ .align 64
#ifdef __svml_sacosh_data_internal_avx512_typedef
typedef unsigned int VUINT32;
typedef struct {
- __declspec(align(64)) VUINT32 Log_tbl_H[32][1];
- __declspec(align(64)) VUINT32 Log_tbl_L[32][1];
- __declspec(align(64)) VUINT32 One[16][1];
- __declspec(align(64)) VUINT32 SmallThreshold[16][1];
- __declspec(align(64)) VUINT32 Threshold[16][1];
- __declspec(align(64)) VUINT32 LargeThreshold[16][1];
- __declspec(align(64)) VUINT32 ca1[16][1];
- __declspec(align(64)) VUINT32 c2s[16][1];
- __declspec(align(64)) VUINT32 c1s[16][1];
- __declspec(align(64)) VUINT32 AddB5[16][1];
- __declspec(align(64)) VUINT32 RcpBitMask[16][1];
- __declspec(align(64)) VUINT32 OneEighth[16][1];
- __declspec(align(64)) VUINT32 Four[16][1];
- __declspec(align(64)) VUINT32 poly_coeff3[16][1];
- __declspec(align(64)) VUINT32 poly_coeff2[16][1];
- __declspec(align(64)) VUINT32 poly_coeff1[16][1];
- __declspec(align(64)) VUINT32 L2H[16][1];
- __declspec(align(64)) VUINT32 L2L[16][1];
- } __svml_sacosh_data_internal_avx512;
+ __declspec(align(64)) VUINT32 Log_tbl_H[32][1];
+ __declspec(align(64)) VUINT32 Log_tbl_L[32][1];
+ __declspec(align(64)) VUINT32 One[16][1];
+ __declspec(align(64)) VUINT32 SmallThreshold[16][1];
+ __declspec(align(64)) VUINT32 Threshold[16][1];
+ __declspec(align(64)) VUINT32 LargeThreshold[16][1];
+ __declspec(align(64)) VUINT32 ca1[16][1];
+ __declspec(align(64)) VUINT32 c2s[16][1];
+ __declspec(align(64)) VUINT32 c1s[16][1];
+ __declspec(align(64)) VUINT32 AddB5[16][1];
+ __declspec(align(64)) VUINT32 RcpBitMask[16][1];
+ __declspec(align(64)) VUINT32 OneEighth[16][1];
+ __declspec(align(64)) VUINT32 Four[16][1];
+ __declspec(align(64)) VUINT32 poly_coeff3[16][1];
+ __declspec(align(64)) VUINT32 poly_coeff2[16][1];
+ __declspec(align(64)) VUINT32 poly_coeff1[16][1];
+ __declspec(align(64)) VUINT32 L2H[16][1];
+ __declspec(align(64)) VUINT32 L2L[16][1];
+} __svml_sacosh_data_internal_avx512;
#endif
__svml_sacosh_data_internal_avx512:
- /*== Log_tbl_H ==*/
- .long 0x00000000
- .long 0xbcfc0000
- .long 0xbd788000
- .long 0xbdb78000
- .long 0xbdf14000
- .long 0xbe14a000
- .long 0xbe300000
- .long 0xbe4aa000
- .long 0xbe648000
- .long 0xbe7dc000
- .long 0xbe8b4000
- .long 0xbe974000
- .long 0xbea31000
- .long 0xbeae9000
- .long 0xbeb9d000
- .long 0xbec4d000
- .long 0xbecfa000
- .long 0xbeda2000
- .long 0xbee48000
- .long 0xbeeea000
- .long 0xbef89000
- .long 0xbf012800
- .long 0xbf05f000
- .long 0xbf0aa800
- .long 0xbf0f4000
- .long 0xbf13c800
- .long 0xbf184000
- .long 0xbf1ca000
- .long 0xbf20f000
- .long 0xbf252800
- .long 0xbf295000
- .long 0xbf2d6800
- /*== Log_tbl_L ==*/
- .align 64
- .long 0x80000000
- .long 0xb726c39e
- .long 0x3839e7fe
- .long 0xb7528ae5
- .long 0x377891d5
- .long 0xb8297c10
- .long 0x37cf8f58
- .long 0x3852b186
- .long 0x35838656
- .long 0xb80c36af
- .long 0x38235454
- .long 0xb862bae1
- .long 0x37e87bc7
- .long 0x37848150
- .long 0x37202511
- .long 0xb74e1b05
- .long 0x385c1340
- .long 0xb8777bcd
- .long 0x36038656
- .long 0xb7d40984
- .long 0xb80f5faf
- .long 0xb8254b4c
- .long 0xb865c84a
- .long 0x37f0b42d
- .long 0xb83ebce1
- .long 0xb83c2513
- .long 0x37a332c4
- .long 0x3779654f
- .long 0x38602f73
- .long 0x367449f8
- .long 0xb7b4996f
- .long 0xb800986b
- /*== One ==*/
- .align 64
- .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
- /*== SmallThreshold ==*/
- .align 64
- .long 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000
- /*== Threshold ==*/
- .align 64
- .long 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000
- /*== LargeThreshold ==*/
- .align 64
- .long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff
- /*== ca1 ==*/
- .align 64
- .long 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE
- /*== c2s ==*/
- .align 64
- .long 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000
- /*== c1s ==*/
- .align 64
- .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000
- /*== AddB5 ==*/
- .align 64
- .long 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000
- /*== RcpBitMask ==*/
- .align 64
- .long 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000
- /*==OneEighth ==*/
- .align 64
- .long 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000
- /*== Four ==*/
- .align 64
- .long 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000
- /*== poly_coeff3 ==*/
- .align 64
- .long 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810
- /*== poly_coeff2 ==*/
- .align 64
- .long 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e
- /*== poly_coeff1 ==*/
- .align 64
- .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000
- /*== L2H = log(2)_high ==*/
- .align 64
- .long 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000
- /*== L2L = log(2)_low ==*/
- .align 64
- .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4
- .align 64
- .type __svml_sacosh_data_internal_avx512,@object
- .size __svml_sacosh_data_internal_avx512,.-__svml_sacosh_data_internal_avx512
+ /* Log_tbl_H */
+ .long 0x00000000
+ .long 0xbcfc0000
+ .long 0xbd788000
+ .long 0xbdb78000
+ .long 0xbdf14000
+ .long 0xbe14a000
+ .long 0xbe300000
+ .long 0xbe4aa000
+ .long 0xbe648000
+ .long 0xbe7dc000
+ .long 0xbe8b4000
+ .long 0xbe974000
+ .long 0xbea31000
+ .long 0xbeae9000
+ .long 0xbeb9d000
+ .long 0xbec4d000
+ .long 0xbecfa000
+ .long 0xbeda2000
+ .long 0xbee48000
+ .long 0xbeeea000
+ .long 0xbef89000
+ .long 0xbf012800
+ .long 0xbf05f000
+ .long 0xbf0aa800
+ .long 0xbf0f4000
+ .long 0xbf13c800
+ .long 0xbf184000
+ .long 0xbf1ca000
+ .long 0xbf20f000
+ .long 0xbf252800
+ .long 0xbf295000
+ .long 0xbf2d6800
+ /* Log_tbl_L */
+ .align 64
+ .long 0x80000000
+ .long 0xb726c39e
+ .long 0x3839e7fe
+ .long 0xb7528ae5
+ .long 0x377891d5
+ .long 0xb8297c10
+ .long 0x37cf8f58
+ .long 0x3852b186
+ .long 0x35838656
+ .long 0xb80c36af
+ .long 0x38235454
+ .long 0xb862bae1
+ .long 0x37e87bc7
+ .long 0x37848150
+ .long 0x37202511
+ .long 0xb74e1b05
+ .long 0x385c1340
+ .long 0xb8777bcd
+ .long 0x36038656
+ .long 0xb7d40984
+ .long 0xb80f5faf
+ .long 0xb8254b4c
+ .long 0xb865c84a
+ .long 0x37f0b42d
+ .long 0xb83ebce1
+ .long 0xb83c2513
+ .long 0x37a332c4
+ .long 0x3779654f
+ .long 0x38602f73
+ .long 0x367449f8
+ .long 0xb7b4996f
+ .long 0xb800986b
+ /* One */
+ .align 64
+ .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
+ /* SmallThreshold */
+ .align 64
+ .long 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000, 0x39800000
+ /* Threshold */
+ .align 64
+ .long 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000, 0x5f000000
+ /* LargeThreshold */
+ .align 64
+ .long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff
+ /* ca1 */
+ .align 64
+ .long 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE, 0xbe2AA5DE
+ /* c2s */
+ .align 64
+ .long 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000, 0x3ec00000
+ /* c1s */
+ .align 64
+ .long 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000, 0x3f000000
+ /* AddB5 */
+ .align 64
+ .long 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000
+ /* RcpBitMask */
+ .align 64
+ .long 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000, 0xfffc0000
+ /* OneEighth */
+ .align 64
+ .long 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000
+ /* Four */
+ .align 64
+ .long 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000, 0x40800000
+ /* poly_coeff3 */
+ .align 64
+ .long 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810, 0xbe800810
+ /* poly_coeff2 */
+ .align 64
+ .long 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e, 0x3eaab11e
+ /* poly_coeff1 */
+ .align 64
+ .long 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000, 0xbf000000
+ /* L2H = log(2)_high */
+ .align 64
+ .long 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000, 0x3f317000
+ /* L2L = log(2)_low */
+ .align 64
+ .long 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4, 0x3805fdf4
+ .align 64
+ .type __svml_sacosh_data_internal_avx512, @object
+ .size __svml_sacosh_data_internal_avx512, .-__svml_sacosh_data_internal_avx512
--
2.34.1
next prev parent reply other threads:[~2022-03-07 15:03 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 14:59 [PATCH 000/126] x86_64: Fix libmvec assembly " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 001/126] x86_64: Fix svml_s_acosf16_core_avx512.S " Sunil K Pandey
2022-03-07 21:50 ` Sunil Pandey
2022-03-07 22:52 ` Noah Goldstein
2022-03-07 14:59 ` [PATCH 002/126] x86_64: Fix svml_s_acosf4_core_sse4.S " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 003/126] x86_64: Fix svml_s_acosf8_core_avx2.S " Sunil K Pandey
2022-03-07 14:59 ` [PATCH 004/126] x86_64: Fix svml_d_acos2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 005/126] x86_64: Fix svml_d_acos4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 006/126] x86_64: Fix svml_d_acos8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` Sunil K Pandey [this message]
2022-03-07 15:00 ` [PATCH 008/126] x86_64: Fix svml_s_acoshf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 009/126] x86_64: Fix svml_s_acoshf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 010/126] x86_64: Fix svml_d_acosh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 011/126] x86_64: Fix svml_d_acosh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 012/126] x86_64: Fix svml_d_acosh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 013/126] x86_64: Fix svml_s_asinf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 014/126] x86_64: Fix svml_s_asinf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 015/126] x86_64: Fix svml_s_asinf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 016/126] x86_64: Fix svml_d_asin2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 017/126] x86_64: Fix svml_d_asin4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 018/126] x86_64: Fix svml_d_asin8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 019/126] x86_64: Fix svml_s_asinhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 020/126] x86_64: Fix svml_s_asinhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 021/126] x86_64: Fix svml_s_asinhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 022/126] x86_64: Fix svml_d_asinh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 023/126] x86_64: Fix svml_d_asinh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 024/126] x86_64: Fix svml_d_asinh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 025/126] x86_64: Fix svml_s_atanf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 026/126] x86_64: Fix svml_s_atanf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 027/126] x86_64: Fix svml_s_atanf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 028/126] x86_64: Fix svml_d_atan2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 029/126] x86_64: Fix svml_d_atan4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 030/126] x86_64: Fix svml_d_atan8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 031/126] x86_64: Fix svml_s_atan2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 032/126] x86_64: Fix svml_s_atan2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 033/126] x86_64: Fix svml_s_atan2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 034/126] x86_64: Fix svml_d_atan22_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 035/126] x86_64: Fix svml_d_atan24_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 036/126] x86_64: Fix svml_d_atan28_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 037/126] x86_64: Fix svml_s_atanhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 038/126] x86_64: Fix svml_s_atanhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 039/126] x86_64: Fix svml_s_atanhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 040/126] x86_64: Fix svml_d_atanh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 041/126] x86_64: Fix svml_d_atanh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 042/126] x86_64: Fix svml_d_atanh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 043/126] x86_64: Fix svml_s_cbrtf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 044/126] x86_64: Fix svml_s_cbrtf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 045/126] x86_64: Fix svml_s_cbrtf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 046/126] x86_64: Fix svml_d_cbrt2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 047/126] x86_64: Fix svml_d_cbrt4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 048/126] x86_64: Fix svml_d_cbrt8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 049/126] x86_64: Fix svml_s_coshf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 050/126] x86_64: Fix svml_s_coshf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 051/126] x86_64: Fix svml_s_coshf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 052/126] x86_64: Fix svml_d_cosh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 053/126] x86_64: Fix svml_d_cosh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 054/126] x86_64: Fix svml_d_cosh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 055/126] x86_64: Fix svml_s_erff16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 056/126] x86_64: Fix svml_s_erff4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 057/126] x86_64: Fix svml_s_erff8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 058/126] x86_64: Fix svml_d_erf2_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 059/126] x86_64: Fix svml_d_erf4_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 060/126] x86_64: Fix svml_d_erf8_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 061/126] x86_64: Fix svml_s_erfcf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 062/126] x86_64: Fix svml_s_erfcf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 063/126] x86_64: Fix svml_s_erfcf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:00 ` [PATCH 064/126] x86_64: Fix svml_d_erfc2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 065/126] x86_64: Fix svml_d_erfc4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 066/126] x86_64: Fix svml_d_erfc8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 067/126] x86_64: Fix svml_s_exp10f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 068/126] x86_64: Fix svml_s_exp10f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 069/126] x86_64: Fix svml_s_exp10f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 070/126] x86_64: Fix svml_d_exp102_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 071/126] x86_64: Fix svml_d_exp104_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 072/126] x86_64: Fix svml_d_exp108_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 073/126] x86_64: Fix svml_s_exp2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 074/126] x86_64: Fix svml_s_exp2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 075/126] x86_64: Fix svml_s_exp2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 076/126] x86_64: Fix svml_d_exp22_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 077/126] x86_64: Fix svml_d_exp24_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 078/126] x86_64: Fix svml_d_exp28_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 079/126] x86_64: Fix svml_s_expm1f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 080/126] x86_64: Fix svml_s_expm1f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 081/126] x86_64: Fix svml_s_expm1f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 082/126] x86_64: Fix svml_d_expm12_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 083/126] x86_64: Fix svml_d_expm14_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 084/126] x86_64: Fix svml_d_expm18_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 085/126] x86_64: Fix svml_s_hypotf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 086/126] x86_64: Fix svml_s_hypotf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 087/126] x86_64: Fix svml_s_hypotf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 088/126] x86_64: Fix svml_d_hypot2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 089/126] x86_64: Fix svml_d_hypot4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 090/126] x86_64: Fix svml_d_hypot8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 091/126] x86_64: Fix svml_s_log10f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 092/126] x86_64: Fix svml_s_log10f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 093/126] x86_64: Fix svml_s_log10f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 094/126] x86_64: Fix svml_d_log102_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 095/126] x86_64: Fix svml_d_log104_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 096/126] x86_64: Fix svml_d_log108_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 097/126] x86_64: Fix svml_s_log1pf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 098/126] x86_64: Fix svml_s_log1pf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 099/126] x86_64: Fix svml_s_log1pf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 100/126] x86_64: Fix svml_d_log1p2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 101/126] x86_64: Fix svml_d_log1p4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 102/126] x86_64: Fix svml_d_log1p8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 103/126] x86_64: Fix svml_s_log2f16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 104/126] x86_64: Fix svml_s_log2f4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 105/126] x86_64: Fix svml_s_log2f8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 106/126] x86_64: Fix svml_d_log22_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 107/126] x86_64: Fix svml_d_log24_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 108/126] x86_64: Fix svml_d_log28_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 109/126] x86_64: Fix svml_s_sinhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 110/126] x86_64: Fix svml_s_sinhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 111/126] x86_64: Fix svml_s_sinhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 112/126] x86_64: Fix svml_d_sinh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 113/126] x86_64: Fix svml_d_sinh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 114/126] x86_64: Fix svml_d_sinh8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 115/126] x86_64: Fix svml_s_tanf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 116/126] x86_64: Fix svml_s_tanf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 117/126] x86_64: Fix svml_s_tanf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 118/126] x86_64: Fix svml_d_tan2_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 119/126] x86_64: Fix svml_d_tan4_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 120/126] x86_64: Fix svml_d_tan8_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 121/126] x86_64: Fix svml_s_tanhf16_core_avx512.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 122/126] x86_64: Fix svml_s_tanhf4_core_sse4.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 123/126] x86_64: Fix svml_s_tanhf8_core_avx2.S " Sunil K Pandey
2022-03-07 15:01 ` [PATCH 124/126] x86_64: Fix svml_d_tanh2_core_sse4.S " Sunil K Pandey
2022-03-07 15:02 ` [PATCH 125/126] x86_64: Fix svml_d_tanh4_core_avx2.S " Sunil K Pandey
2022-03-07 15:02 ` [PATCH 126/126] x86_64: Fix svml_d_tanh8_core_avx512.S " Sunil K Pandey
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