From: caiyinyu <caiyinyu@loongson.cn>
To: adhemerval.zanella@linaro.org, libc-alpha@sourceware.org,
i.swmail@xen0n.name
Cc: joseph_myers@mentor.com, carlos@redhat.com,
xuchenghua@loongson.cn, caiyinyu <caiyinyu@loongson.cn>
Subject: [PATCH 1/1] LoongArch: Fix ptr mangling/demangling features.
Date: Thu, 18 Aug 2022 10:19:00 +0800 [thread overview]
Message-ID: <20220818021900.3436740-1-caiyinyu@loongson.cn> (raw)
Tested on LoongArch machine: gcc 13.0.0, Linux kernel 5.19.0 rc2,
binutils branch master 2eb132bdfb9.
This patch is ok with gcc 12.0.1, Linux kernel 5.19.0 rc5, binutils
2.39.
---
sysdeps/loongarch/__longjmp.S | 2 +-
sysdeps/loongarch/setjmp.S | 2 +-
sysdeps/unix/sysv/linux/loongarch/sysdep.h | 33 +++++++++++-----------
3 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/sysdeps/loongarch/__longjmp.S b/sysdeps/loongarch/__longjmp.S
index c2c5b56a80..4207376f5e 100644
--- a/sysdeps/loongarch/__longjmp.S
+++ b/sysdeps/loongarch/__longjmp.S
@@ -22,7 +22,7 @@
ENTRY (__longjmp)
#ifdef PTR_MANGLE
REG_L t0, a0, 0*SZREG
- PTR_DEMANGLE (ra, t0, t1, t2)
+ PTR_DEMANGLE (ra, t0, t1)
REG_L t0, a0, 1*SZREG
PTR_DEMANGLE2 (sp, t0, t1)
#else
diff --git a/sysdeps/loongarch/setjmp.S b/sysdeps/loongarch/setjmp.S
index ec4ddc72da..298bb02a82 100644
--- a/sysdeps/loongarch/setjmp.S
+++ b/sysdeps/loongarch/setjmp.S
@@ -30,7 +30,7 @@ END (setjmp)
ENTRY (__sigsetjmp)
#ifdef PTR_MANGLE
- PTR_MANGLE (t0, ra, t1, t2)
+ PTR_MANGLE (t0, ra, t1)
REG_S t0, a0, 0*SZREG
PTR_MANGLE2 (t0, sp, t1)
REG_S t0, a0, 1*SZREG
diff --git a/sysdeps/unix/sysv/linux/loongarch/sysdep.h b/sysdeps/unix/sysv/linux/loongarch/sysdep.h
index 157cbd6c6b..f4a1d23a97 100644
--- a/sysdeps/unix/sysv/linux/loongarch/sysdep.h
+++ b/sysdeps/unix/sysv/linux/loongarch/sysdep.h
@@ -316,29 +316,28 @@ extern long int __syscall_error (long int neg_errno);
/* Pointer mangling is supported for LoongArch. */
-/* Load or store to/from a got-relative EXPR into/from G, using T.
+/* Load a got-relative EXPR into G, using T.
Note G and T are register names. */
-#define LDST_GLOBAL(OP, G, T, EXPR) \
- pcalau12i T, %got_pc_hi20(EXPR); \
- OP T, T, %got_pc_lo12(EXPR); \
- OP G, T, 0;
+#define LD_GLOBAL(G, EXPR) \
+ la.global G, EXPR; \
+ REG_L G, G, 0;
-/* Load or store to/from a pc-relative EXPR into/from G, using T.
+/* Load a pc-relative EXPR into G, using T.
Note G and T are register names. */
-#define LDST_PCREL(OP, G, T, EXPR) \
- pcalau12i T, %pc_hi20(EXPR); \
- OP G, T, %pc_lo12(EXPR);
+#define LD_PCREL(G, EXPR) \
+ la.pcrel G, EXPR; \
+ REG_L G, G, 0;
#if (IS_IN (rtld) \
|| (!defined SHARED && (IS_IN (libc) \
|| IS_IN (libpthread))))
#ifdef __ASSEMBLER__
-#define PTR_MANGLE(dst, src, guard, tmp) \
- LDST_PCREL (REG_L, guard, tmp, __pointer_chk_guard_local); \
+#define PTR_MANGLE(dst, src, guard) \
+ LD_PCREL (guard, __pointer_chk_guard_local); \
PTR_MANGLE2 (dst, src, guard);
-#define PTR_DEMANGLE(dst, src, guard, tmp) \
- LDST_PCREL (REG_L, guard, tmp, __pointer_chk_guard_local); \
+#define PTR_DEMANGLE(dst, src, guard) \
+ LD_PCREL (guard, __pointer_chk_guard_local); \
PTR_DEMANGLE2 (dst, src, guard);
/* Use PTR_MANGLE2 for efficiency if guard is already loaded. */
#define PTR_MANGLE2(dst, src, guard) \
@@ -355,11 +354,11 @@ extern uintptr_t __pointer_chk_guard_local attribute_relro attribute_hidden;
#else
#ifdef __ASSEMBLER__
-#define PTR_MANGLE(dst, src, guard, tmp) \
- LDST_GLOBAL (REG_L, guard, tmp, __pointer_chk_guard); \
+#define PTR_MANGLE(dst, src, guard) \
+ LD_GLOBAL (guard, __pointer_chk_guard); \
PTR_MANGLE2 (dst, src, guard);
-#define PTR_DEMANGLE(dst, src, guard, tmp) \
- LDST_GLOBAL (REG_L, guard, tmp, __pointer_chk_guard); \
+#define PTR_DEMANGLE(dst, src, guard) \
+ LD_GLOBAL (guard, __pointer_chk_guard); \
PTR_DEMANGLE2 (dst, src, guard);
/* Use PTR_MANGLE2 for efficiency if guard is already loaded. */
#define PTR_MANGLE2(dst, src, guard) \
--
2.31.1
next reply other threads:[~2022-08-18 2:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-18 2:19 caiyinyu [this message]
2022-08-21 13:29 ` Xi Ruoyao
2022-08-23 12:31 ` caiyinyu
2022-08-26 8:03 caiyinyu
2022-08-29 7:08 ` Xi Ruoyao
2022-08-29 12:41 ` Adhemerval Zanella Netto
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