From: Noah Goldstein <goldstein.w.n@gmail.com>
To: libc-alpha@sourceware.org
Cc: goldstein.w.n@gmail.com, hjl.tools@gmail.com, carlos@systemhalted.org
Subject: [PATCH v1 2/4] nptl: Continue use arch prefered atomic exchange in spinlock loop
Date: Wed, 28 Sep 2022 20:14:52 -0700 [thread overview]
Message-ID: <20220929031452.2551219-2-goldstein.w.n@gmail.com> (raw)
In-Reply-To: <20220929031452.2551219-1-goldstein.w.n@gmail.com>
Despite using the preferred atomic exchange in the initial check, the
loop was unconditionally using CAS which is not desired on some
architectures (those that didn't set `ATOMIC_EXCHANGE_USES_CAS`).
No meaningful perf changes measured on broadwell but still seems like
a reasonable change.
Full check passes on x86-64.
---
nptl/pthread_spin_lock.c | 29 ++++++++++++++++-------------
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/nptl/pthread_spin_lock.c b/nptl/pthread_spin_lock.c
index 19d1759f9a..1bdd6e2048 100644
--- a/nptl/pthread_spin_lock.c
+++ b/nptl/pthread_spin_lock.c
@@ -20,6 +20,20 @@
#include "pthreadP.h"
#include <shlib-compat.h>
+#if ATOMIC_EXCHANGE_USES_CAS
+/* Try to acquire the lock with a CAS instruction as this architecture
+ has no exchange instruction. The acquisition succeeds if the lock is not
+ acquired. */
+# define pthread_spin_lock_grab_lock(mem, val, c) \
+ atomic_compare_exchange_weak_acquire (lock, &val, 1))
+#else
+/* Try to acquire the lock with an exchange instruction as this architecture
+ has such an instruction and we assume it is faster than a CAS.
+ The acquisition succeeds if the lock is not in an acquired state. */
+# define pthread_spin_lock_grab_lock(mem, val, c) \
+ (atomic_exchange_acquire (lock, 1) == 0)
+#endif
+
int
__pthread_spin_lock (pthread_spinlock_t *lock)
{
@@ -36,19 +50,8 @@ __pthread_spin_lock (pthread_spinlock_t *lock)
We use acquire MO to synchronize-with the release MO store in
pthread_spin_unlock, and thus ensure that prior critical sections
happen-before this critical section. */
-#if ! ATOMIC_EXCHANGE_USES_CAS
- /* Try to acquire the lock with an exchange instruction as this architecture
- has such an instruction and we assume it is faster than a CAS.
- The acquisition succeeds if the lock is not in an acquired state. */
- if (__glibc_likely (atomic_exchange_acquire (lock, 1) == 0))
+ if (__glibc_likely (pthread_spin_lock_grab_lock (lock, &val, 1)))
return 0;
-#else
- /* Try to acquire the lock with a CAS instruction as this architecture
- has no exchange instruction. The acquisition succeeds if the lock is not
- acquired. */
- if (__glibc_likely (atomic_compare_exchange_weak_acquire (lock, &val, 1)))
- return 0;
-#endif
do
{
@@ -75,7 +78,7 @@ __pthread_spin_lock (pthread_spinlock_t *lock)
/* We need acquire memory order here for the same reason as mentioned
for the first try to lock the spinlock. */
}
- while (!atomic_compare_exchange_weak_acquire (lock, &val, 1));
+ while (!pthread_spin_lock_grab_lock (lock, &val, 1));
return 0;
}
--
2.34.1
next prev parent reply other threads:[~2022-09-29 3:14 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-29 3:14 [PATCH v1 1/4] Benchtests: Add benchtests for pthread_spin_lock and mutex_trylock Noah Goldstein
2022-09-29 3:14 ` Noah Goldstein [this message]
2022-09-29 16:35 [PATCH v1 2/4] nptl: Continue use arch prefered atomic exchange in spinlock loop Wilco Dijkstra
2022-09-29 18:38 ` Noah Goldstein
2022-09-29 18:50 ` Wilco Dijkstra
2022-09-29 18:51 ` H.J. Lu
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