From: Noah Goldstein <goldstein.w.n@gmail.com>
To: libc-alpha@sourceware.org
Cc: goldstein.w.n@gmail.com, hjl.tools@gmail.com,
andrey.kolesov@intel.com, carlos@systemhalted.org
Subject: [PATCH v1 18/27] x86/fpu: Optimize svml_s_log10f16_core_avx512.S
Date: Wed, 7 Dec 2022 00:52:27 -0800 [thread overview]
Message-ID: <20221207085236.1424424-18-goldstein.w.n@gmail.com> (raw)
In-Reply-To: <20221207085236.1424424-1-goldstein.w.n@gmail.com>
1. Improve special values case which ends up covering ~half of all
float bit patterns.
2. Cleanup some missed optimizations in instruction selection /
unnecissary repeated rodata references.
3. Remove unused rodata.
4. Use common data definitions where possible.
Code Size Change: -52 Bytes (226 - 278)
Input New Time / Old Time
0F (0x00000000) -> 0.9484
0F (0x0000ffff, Denorm) -> 0.9668
.1F (0x3dcccccd) -> 0.9934
5F (0x40a00000) -> 0.9859
2315255808F (0x4f0a0000) -> 0.9926
-NaN (0xffffffff) -> 0.9808
---
.../multiarch/svml_s_log10f16_core_avx512.S | 296 ++++++++----------
1 file changed, 125 insertions(+), 171 deletions(-)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log10f16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log10f16_core_avx512.S
index bea2124519..5b68fbea61 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_log10f16_core_avx512.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log10f16_core_avx512.S
@@ -27,211 +27,165 @@
*
*/
-/* Offsets for data table __svml_slog10_data_internal_avx512
- */
-#define One 0
-#define coeff4 64
-#define coeff3 128
-#define coeff2 192
-#define coeff1 256
-#define L2 320
+#define LOCAL_DATA_NAME __svml_slog10_data_internal
+#include "svml_s_common_evex512_rodata_offsets.h"
+
+/* Offsets for data table __svml_slog10_data_internal. */
+#define _Coeff_4 0
+#define _Coeff_3 64
+#define _Coeff_2 128
+#define _Coeff_1 192
+#define _L2 256
#include <sysdep.h>
.section .text.evex512, "ax", @progbits
ENTRY(_ZGVeN16v_log10f_skx)
- pushq %rbp
- cfi_def_cfa_offset(16)
- movq %rsp, %rbp
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
- andq $-64, %rsp
- subq $192, %rsp
vgetmantps $11, {sae}, %zmm0, %zmm3
- vmovups __svml_slog10_data_internal_avx512(%rip), %zmm1
+ vmovups COMMON_DATA(_OneF)(%rip), %zmm1
vgetexpps {sae}, %zmm0, %zmm5
- vmovups L2+__svml_slog10_data_internal_avx512(%rip), %zmm10
vpsrld $19, %zmm3, %zmm7
vgetexpps {sae}, %zmm3, %zmm6
vsubps {rn-sae}, %zmm1, %zmm3, %zmm11
- vpermps coeff4+__svml_slog10_data_internal_avx512(%rip), %zmm7, %zmm1
- vpermps coeff3+__svml_slog10_data_internal_avx512(%rip), %zmm7, %zmm2
+ vpermps LOCAL_DATA(_Coeff_4)(%rip), %zmm7, %zmm1
+ vpermps LOCAL_DATA(_Coeff_3)(%rip), %zmm7, %zmm2
vsubps {rn-sae}, %zmm6, %zmm5, %zmm9
- vpermps coeff2+__svml_slog10_data_internal_avx512(%rip), %zmm7, %zmm4
- vpermps coeff1+__svml_slog10_data_internal_avx512(%rip), %zmm7, %zmm8
+ vpermps LOCAL_DATA(_Coeff_2)(%rip), %zmm7, %zmm4
+ vpermps LOCAL_DATA(_Coeff_1)(%rip), %zmm7, %zmm8
- /* x<=0? */
- vfpclassps $94, %zmm0, %k0
+ /* x<=0? */
+ vfpclassps $0x5e, %zmm0, %k0
vfmadd213ps {rn-sae}, %zmm2, %zmm11, %zmm1
- vmulps {rn-sae}, %zmm10, %zmm9, %zmm12
+ vmulps LOCAL_DATA(_L2)(%rip), %zmm9, %zmm12
vfmadd213ps {rn-sae}, %zmm4, %zmm11, %zmm1
- kmovw %k0, %edx
vfmadd213ps {rn-sae}, %zmm8, %zmm11, %zmm1
vfmadd213ps {rn-sae}, %zmm12, %zmm11, %zmm1
+ kmovd %k0, %edx
testl %edx, %edx
- /* Go to special inputs processing branch */
+ /* Go to special inputs processing branch. */
jne L(SPECIAL_VALUES_BRANCH)
- # LOE rbx r12 r13 r14 r15 edx zmm0 zmm1
-
- /* Restore registers
- * and exit the function
- */
-L(EXIT):
+ /* Restore registers * and exit the function. */
vmovaps %zmm1, %zmm0
- movq %rbp, %rsp
- popq %rbp
- cfi_def_cfa(7, 8)
- cfi_restore(6)
ret
- cfi_def_cfa(6, 16)
- cfi_offset(6, -16)
- /* Branch to process
- * special inputs
- */
+ /* Cold case. edx has 1s where there was a special value that
+ needs to be handled by a tanf call. Optimize for code size
+ moreso than speed here. */
L(SPECIAL_VALUES_BRANCH):
- vmovups %zmm0, 64(%rsp)
- vmovups %zmm1, 128(%rsp)
- # LOE rbx r12 r13 r14 r15 edx zmm1
- xorl %eax, %eax
- # LOE rbx r12 r13 r14 r15 eax edx
+ /* Use r13 to save/restore the stack. This allows us to use rbp
+ as callee save register saving code size. */
+ pushq %r13
+ cfi_def_cfa (rsp, 16)
+ /* Need to callee save registers to preserve state across tanf
+ calls. */
+ pushq %rbx
+ cfi_def_cfa (rsp, 24)
+ pushq %rbp
+ cfi_def_cfa (rsp, 32)
+ movq %rsp, %r13
+ cfi_def_cfa (r13, 32)
+
+ /* Align stack and make room for 2x zmm vectors. */
+ andq $-64, %rsp
+ addq $-128, %rsp
+
+ /* Save original input. */
+ vmovaps %zmm0, 64(%rsp)
+ /* Save all already computed inputs. */
+ vmovaps %zmm1, (%rsp)
vzeroupper
- movq %r12, 16(%rsp)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
- movl %eax, %r12d
- movq %r13, 8(%rsp)
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
- movl %edx, %r13d
- movq %r14, (%rsp)
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r15 r12d r13d
-
- /* Range mask
- * bits check
- */
-
-L(RANGEMASK_CHECK):
- btl %r12d, %r13d
-
- /* Call scalar math function */
- jc L(SCALAR_MATH_CALL)
- # LOE rbx r15 r12d r13d
-
- /* Special inputs
- * processing loop
- */
+ /* edx has 1s where there was a special value that needs to be
+ handled by a tanf call. */
+ movl %edx, %ebx
L(SPECIAL_VALUES_LOOP):
- incl %r12d
- cmpl $16, %r12d
-
- /* Check bits in range mask */
- jl L(RANGEMASK_CHECK)
- # LOE rbx r15 r12d r13d
-
- movq 16(%rsp), %r12
- cfi_restore(12)
- movq 8(%rsp), %r13
- cfi_restore(13)
- movq (%rsp), %r14
- cfi_restore(14)
- vmovups 128(%rsp), %zmm1
-
- /* Go to exit */
- jmp L(EXIT)
- /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */
- .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */
- .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22
- /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */
- .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22
- # LOE rbx r12 r13 r14 r15 zmm1
-
- /* Scalar math fucntion call
- * to process special input
- */
-
-L(SCALAR_MATH_CALL):
- movl %r12d, %r14d
- vmovss 64(%rsp, %r14, 4), %xmm0
+
+ /* use rbp as index for special value that is saved across calls
+ to tanf. We technically don't need a callee save register
+ here as offset to rsp is always [0, 56] so we can restore
+ rsp by realigning to 64. Essentially the tradeoff is 1 extra
+ save/restore vs 2 extra instructions in the loop. Realigning
+ also costs more code size. */
+ xorl %ebp, %ebp
+ tzcntl %ebx, %ebp
+
+ /* Scalar math fucntion call to process special input. */
+ movss 64(%rsp, %rbp, 4), %xmm0
call log10f@PLT
- # LOE rbx r14 r15 r12d r13d xmm0
- vmovss %xmm0, 128(%rsp, %r14, 4)
+ /* No good way to avoid the store-forwarding fault this will
+ cause on return. `lfence` avoids the SF fault but at greater
+ cost as it serialized stack/callee save restoration. */
+ movss %xmm0, (%rsp, %rbp, 4)
- /* Process special inputs in loop */
- jmp L(SPECIAL_VALUES_LOOP)
- # LOE rbx r15 r12d r13d
+ blsrl %ebx, %ebx
+ jnz L(SPECIAL_VALUES_LOOP)
+
+
+ /* All results have been written to 64(%rsp). */
+ vmovaps (%rsp), %zmm0
+ /* Restore rsp. */
+ movq %r13, %rsp
+ cfi_def_cfa (rsp, 32)
+ /* Restore callee save registers. */
+ popq %rbp
+ cfi_def_cfa (rsp, 24)
+ popq %rbx
+ cfi_def_cfa (rsp, 16)
+ popq %r13
+ ret
END(_ZGVeN16v_log10f_skx)
- .section .rodata, "a"
+ .section .rodata.evex512, "a"
.align 64
-#ifdef __svml_slog10_data_internal_avx512_typedef
-typedef unsigned int VUINT32;
-typedef struct {
- __declspec(align(64)) VUINT32 One[16][1];
- __declspec(align(64)) VUINT32 coeff4[16][1];
- __declspec(align(64)) VUINT32 coeff3[16][1];
- __declspec(align(64)) VUINT32 coeff2[16][1];
- __declspec(align(64)) VUINT32 coeff1[16][1];
- __declspec(align(64)) VUINT32 L2[16][1];
-} __svml_slog10_data_internal_avx512;
-#endif
-__svml_slog10_data_internal_avx512:
- /* One */
- .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
- // c4
- .align 64
- .long 0xbdc9ae9b, 0xbda6fcf4
- .long 0xbd8bac76, 0xbd6bca30
- .long 0xbd48a99b, 0xbd2c0a9f
- .long 0xbd1480db, 0xbd00faf2
- .long 0xbe823aa9, 0xbe656348
- .long 0xbe4afbb9, 0xbe346895
- .long 0xbe20ffff, 0xbe103a0b
- .long 0xbe01a91c, 0xbde9e84e
- // c3
- .align 64
- .long 0x3e13d888, 0x3e10a87c
- .long 0x3e0b95c3, 0x3e057f0b
- .long 0x3dfde038, 0x3df080d9
- .long 0x3de34c1e, 0x3dd68333
- .long 0x3dac6e8e, 0x3dd54a51
- .long 0x3df30f40, 0x3e04235d
- .long 0x3e0b7033, 0x3e102c90
- .long 0x3e12ebad, 0x3e141ff8
- // c2
- .align 64
- .long 0xbe5e5a9b, 0xbe5e2677
- .long 0xbe5d83f5, 0xbe5c6016
- .long 0xbe5abd0b, 0xbe58a6fd
- .long 0xbe562e02, 0xbe5362f8
- .long 0xbe68e27c, 0xbe646747
- .long 0xbe619a73, 0xbe5ff05a
- .long 0xbe5f0570, 0xbe5e92d0
- .long 0xbe5e662b, 0xbe5e5c08
- // c1
- .align 64
- .long 0x3ede5bd8, 0x3ede5b45
- .long 0x3ede57d8, 0x3ede4eb1
- .long 0x3ede3d37, 0x3ede2166
- .long 0x3eddf9d9, 0x3eddc5bb
- .long 0x3ede08ed, 0x3ede32e7
- .long 0x3ede4967, 0x3ede5490
- .long 0x3ede597f, 0x3ede5b50
- .long 0x3ede5bca, 0x3ede5bd9
- /* L2 */
- .align 64
- .long 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b, 0x3e9a209b
- .align 64
- .type __svml_slog10_data_internal_avx512, @object
- .size __svml_slog10_data_internal_avx512, .-__svml_slog10_data_internal_avx512
+LOCAL_DATA_NAME:
+ float_block (LOCAL_DATA_NAME, _Coeff_4,
+ 0xbdc9ae9b, 0xbda6fcf4,
+ 0xbd8bac76, 0xbd6bca30,
+ 0xbd48a99b, 0xbd2c0a9f,
+ 0xbd1480db, 0xbd00faf2,
+ 0xbe823aa9, 0xbe656348,
+ 0xbe4afbb9, 0xbe346895,
+ 0xbe20ffff, 0xbe103a0b,
+ 0xbe01a91c, 0xbde9e84e)
+
+ float_block (LOCAL_DATA_NAME, _Coeff_3,
+ 0x3e13d888, 0x3e10a87c,
+ 0x3e0b95c3, 0x3e057f0b,
+ 0x3dfde038, 0x3df080d9,
+ 0x3de34c1e, 0x3dd68333,
+ 0x3dac6e8e, 0x3dd54a51,
+ 0x3df30f40, 0x3e04235d,
+ 0x3e0b7033, 0x3e102c90,
+ 0x3e12ebad, 0x3e141ff8)
+
+ float_block (LOCAL_DATA_NAME, _Coeff_2,
+ 0xbe5e5a9b, 0xbe5e2677,
+ 0xbe5d83f5, 0xbe5c6016,
+ 0xbe5abd0b, 0xbe58a6fd,
+ 0xbe562e02, 0xbe5362f8,
+ 0xbe68e27c, 0xbe646747,
+ 0xbe619a73, 0xbe5ff05a,
+ 0xbe5f0570, 0xbe5e92d0,
+ 0xbe5e662b, 0xbe5e5c08)
+
+ float_block (LOCAL_DATA_NAME, _Coeff_1,
+ 0x3ede5bd8, 0x3ede5b45,
+ 0x3ede57d8, 0x3ede4eb1,
+ 0x3ede3d37, 0x3ede2166,
+ 0x3eddf9d9, 0x3eddc5bb,
+ 0x3ede08ed, 0x3ede32e7,
+ 0x3ede4967, 0x3ede5490,
+ 0x3ede597f, 0x3ede5b50,
+ 0x3ede5bca, 0x3ede5bd9)
+
+ DATA_VEC (LOCAL_DATA_NAME, _L2, 0x3e9a209b)
+
+ .type LOCAL_DATA_NAME, @object
+ .size LOCAL_DATA_NAME, .-LOCAL_DATA_NAME
--
2.34.1
next prev parent reply other threads:[~2022-12-07 8:53 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-07 8:52 [PATCH v1 01/27] x86/fpu: Create helper file for common data macros Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 02/27] x86/fpu: Add file for common data used across svml_s_*_avx2.S files Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 03/27] x86/fpu: Add file for common data used across svml_s_*_avx512.S files Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 04/27] x86/fpu: Add file for common data used across svml_s_*_sse4.S files Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 05/27] x86/fpu: Build common data files for svml_s_*_{avx512,avx2,sse4}.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 06/27] x86/fpu: Update rodata usage in svml_s_tanhf_*_{avx2,sse4} Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 07/27] x86/fpu: Update rodata usage in svml_s_tanhf16_core_avx512.S Noah Goldstein
2022-12-16 17:05 ` H.J. Lu
2022-12-16 18:17 ` Noah Goldstein
2022-12-16 21:37 ` H.J. Lu
2022-12-16 21:51 ` Noah Goldstein
2022-12-16 22:01 ` H.J. Lu
2022-12-16 22:54 ` Sunil Pandey
2023-06-27 18:23 ` Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 08/27] x86/fpu: Update rodata usage in svml_s_atanhf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 09/27] x86/fpu: Update rodata usage in svml_s_atanhf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 10/27] x86/fpu: Update rodata usage in svml_s_atanhf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 11/27] x86/fpu: Optimize svml_s_atanf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 12/27] x86/fpu: Optimize svml_s_atanf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 13/27] x86/fpu: Optimize svml_s_atanf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 14/27] x86/fpu: Add common rodata file for svml_s_tanf_*_{avx512,avx2,sse4}.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 15/27] x86/fpu: Optimize svml_s_tanf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 16/27] x86/fpu: Optimize svml_s_tanf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 17/27] x86/fpu: Optimize svml_s_tanf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` Noah Goldstein [this message]
2022-12-07 8:52 ` [PATCH v1 19/27] x86/fpu: Optimize svml_s_log10f4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 20/27] x86/fpu: Optimize svml_s_log10f8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 21/27] x86/fpu: Optimize svml_s_log2f16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 22/27] x86/fpu: Optimize svml_s_log2f4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 23/27] x86/fpu: Optimize svml_s_log2f8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 24/27] x86/fpu: Optimize svml_s_logf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 25/27] x86/fpu: Optimize svml_s_logf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 26/27] x86/fpu: Optimize svml_s_logf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 27/27] x86/fpu: Remove unused svml_s_logf_data.S file Noah Goldstein
2022-12-07 23:53 ` [PATCH v1 01/27] x86/fpu: Create helper file for common data macros H.J. Lu
2022-12-08 0:13 ` Noah Goldstein
2022-12-08 0:22 ` H.J. Lu
2022-12-08 0:46 ` Noah Goldstein
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