From: Noah Goldstein <goldstein.w.n@gmail.com>
To: libc-alpha@sourceware.org
Cc: goldstein.w.n@gmail.com, hjl.tools@gmail.com,
andrey.kolesov@intel.com, carlos@systemhalted.org
Subject: [PATCH v1 22/27] x86/fpu: Optimize svml_s_log2f4_core_sse4.S
Date: Wed, 7 Dec 2022 00:52:31 -0800 [thread overview]
Message-ID: <20221207085236.1424424-22-goldstein.w.n@gmail.com> (raw)
In-Reply-To: <20221207085236.1424424-1-goldstein.w.n@gmail.com>
1. Improve special values case which ends up covering ~half of all
float bit patterns.
2. Cleanup some missed optimizations in instruction selection /
unnecissary repeated rodata references.
3. Remove unused rodata.
4. Use common data definitions where possible.
Code Size Change: -56 Bytes (256 - 312)
Input New Time / Old Time
0F (0x00000000) -> 0.9048
0F (0x0000ffff, Denorm) -> 0.9910
.1F (0x3dcccccd) -> 0.9399
5F (0x40a00000) -> 0.9425
2315255808F (0x4f0a0000) -> 0.9312
-NaN (0xffffffff) -> 0.9230
---
.../fpu/multiarch/svml_s_log2f4_core_sse4.S | 292 +++++++-----------
1 file changed, 115 insertions(+), 177 deletions(-)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S
index bc6a778b75..b877bbb034 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_log2f4_core_sse4.S
@@ -27,196 +27,134 @@
*
*/
-/* Offsets for data table __svml_slog2_data_internal
- */
-#define MinNorm 0
-#define MaxNorm 16
-#define iBrkValue 32
-#define iOffExpoMask 48
-#define One 64
-#define sPoly 80
+#define LOCAL_DATA_NAME __svml_slog2_data_internal
+#include "svml_s_common_sse4_rodata_offsets.h"
+/* Offsets for data table __svml_slog2_data_internal. */
+#define _Coeff_3 0
+#define _Coeff_2 16
+#define _Coeff_7 32
+#define _Coeff_6 48
+#define _Coeff_9 64
+#define _Coeff_8 80
+#define _Coeff_5 96
+#define _Coeff_4 112
+#define _Coeff_1 128
+
#include <sysdep.h>
.section .text.sse4, "ax", @progbits
ENTRY(_ZGVbN4v_log2f_sse4)
- subq $72, %rsp
- cfi_def_cfa_offset(80)
- movaps %xmm0, %xmm1
-
- /* reduction: compute r, n */
- movdqu iBrkValue+__svml_slog2_data_internal(%rip), %xmm2
- movaps %xmm0, %xmm4
- movdqu iOffExpoMask+__svml_slog2_data_internal(%rip), %xmm10
- psubd %xmm2, %xmm1
- pand %xmm1, %xmm10
- movaps %xmm0, %xmm3
- paddd %xmm2, %xmm10
- psrad $23, %xmm1
- movups sPoly+__svml_slog2_data_internal(%rip), %xmm5
- movups sPoly+32+__svml_slog2_data_internal(%rip), %xmm6
- movups sPoly+64+__svml_slog2_data_internal(%rip), %xmm7
- movups sPoly+96+__svml_slog2_data_internal(%rip), %xmm9
- cmpltps MinNorm+__svml_slog2_data_internal(%rip), %xmm4
- cmpnleps MaxNorm+__svml_slog2_data_internal(%rip), %xmm3
- cvtdq2ps %xmm1, %xmm1
- subps One+__svml_slog2_data_internal(%rip), %xmm10
- mulps %xmm10, %xmm5
- movaps %xmm10, %xmm8
- mulps %xmm10, %xmm6
- mulps %xmm10, %xmm8
- addps sPoly+16+__svml_slog2_data_internal(%rip), %xmm5
- mulps %xmm10, %xmm7
- addps sPoly+48+__svml_slog2_data_internal(%rip), %xmm6
- mulps %xmm10, %xmm9
- mulps %xmm8, %xmm5
- addps sPoly+80+__svml_slog2_data_internal(%rip), %xmm7
- addps sPoly+112+__svml_slog2_data_internal(%rip), %xmm9
- addps %xmm5, %xmm6
- mulps %xmm8, %xmm6
- orps %xmm3, %xmm4
-
- /* combine and get argument value range mask */
- movmskps %xmm4, %edx
- addps %xmm6, %xmm7
- mulps %xmm7, %xmm8
- addps %xmm8, %xmm9
- mulps %xmm10, %xmm9
- addps sPoly+128+__svml_slog2_data_internal(%rip), %xmm9
- mulps %xmm9, %xmm10
- addps %xmm10, %xmm1
- testl %edx, %edx
-
- /* Go to special inputs processing branch */
+ movdqu COMMON_DATA(_NotiOffExpoMask)(%rip), %xmm1
+ movaps %xmm0, %xmm2
+ psubd %xmm1, %xmm0
+ movaps COMMON_DATA(_ILoRange)(%rip), %xmm5
+
+ pcmpgtd %xmm0, %xmm5
+ /* combine and get argument value range mask. */
+ movmskps %xmm5, %eax
+ /* reduction: compute r, n. */
+ movdqu COMMON_DATA(_IBrkValue)(%rip), %xmm0
+ movaps %xmm2, %xmm5
+ psubd %xmm0, %xmm2
+ pandn %xmm2, %xmm1
+ paddd %xmm0, %xmm1
+ psrad $0x17, %xmm2
+ cvtdq2ps %xmm2, %xmm0
+ subps COMMON_DATA(_OneF)(%rip), %xmm1
+ movups LOCAL_DATA(_Coeff_3)(%rip), %xmm2
+ mulps %xmm1, %xmm2
+ addps LOCAL_DATA(_Coeff_2)(%rip), %xmm2
+ movups LOCAL_DATA(_Coeff_7)(%rip), %xmm4
+ mulps %xmm1, %xmm4
+ addps LOCAL_DATA(_Coeff_6)(%rip), %xmm4
+ movups LOCAL_DATA(_Coeff_9)(%rip), %xmm3
+ mulps %xmm1, %xmm3
+ addps LOCAL_DATA(_Coeff_8)(%rip), %xmm3
+ movaps %xmm1, %xmm6
+ mulps %xmm1, %xmm1
+ mulps %xmm1, %xmm3
+ addps %xmm3, %xmm4
+ mulps %xmm1, %xmm4
+ movups LOCAL_DATA(_Coeff_5)(%rip), %xmm3
+ mulps %xmm6, %xmm3
+ addps LOCAL_DATA(_Coeff_4)(%rip), %xmm3
+ addps %xmm4, %xmm3
+ mulps %xmm3, %xmm1
+ addps %xmm1, %xmm2
+ mulps %xmm6, %xmm2
+ addps LOCAL_DATA(_Coeff_1)(%rip), %xmm2
+ mulps %xmm2, %xmm6
+ addps %xmm6, %xmm0
+ testl %eax, %eax
+ /* Go to special inputs processing branch. */
jne L(SPECIAL_VALUES_BRANCH)
- # LOE rbx rbp r12 r13 r14 r15 edx xmm0 xmm1
-
- /* Restore registers
- * and exit the function
- */
-
-L(EXIT):
- movaps %xmm1, %xmm0
- addq $72, %rsp
- cfi_def_cfa_offset(8)
ret
- cfi_def_cfa_offset(80)
-
- /* Branch to process
- * special inputs
- */
+ /* Cold case. edx has 1s where there was a special value that
+ more so than speed here. */
L(SPECIAL_VALUES_BRANCH):
- movups %xmm0, 32(%rsp)
- movups %xmm1, 48(%rsp)
- # LOE rbx rbp r12 r13 r14 r15 edx
-
- xorl %eax, %eax
- movq %r12, 16(%rsp)
- cfi_offset(12, -64)
- movl %eax, %r12d
- movq %r13, 8(%rsp)
- cfi_offset(13, -72)
- movl %edx, %r13d
- movq %r14, (%rsp)
- cfi_offset(14, -80)
- # LOE rbx rbp r15 r12d r13d
-
- /* Range mask
- * bits check
- */
-
-L(RANGEMASK_CHECK):
- btl %r12d, %r13d
-
- /* Call scalar math function */
- jc L(SCALAR_MATH_CALL)
- # LOE rbx rbp r15 r12d r13d
-
- /* Special inputs
- * processing loop
- */
-
+ /* Stack coming in 16-byte aligned. Set 8-byte misaligned so on
+ call entry will be 16-byte aligned. */
+ subq $0x38, %rsp
+ movups %xmm0, 24(%rsp)
+ movups %xmm5, 40(%rsp)
+
+ /* Use rbx/rbp for callee save registers as they get short
+ encoding for many instructions (as compared with r12/r13). */
+ movq %rbx, (%rsp)
+ cfi_offset (rbx, -64)
+ movq %rbp, 8(%rsp)
+ cfi_offset (rbp, -56)
+ /* edx has 1s where there was a special value that needs to be
+ handled by a tanhf call. */
+ movl %eax, %ebx
L(SPECIAL_VALUES_LOOP):
- incl %r12d
- cmpl $4, %r12d
-
- /* Check bits in range mask */
- jl L(RANGEMASK_CHECK)
- # LOE rbx rbp r15 r12d r13d
-
- movq 16(%rsp), %r12
- cfi_restore(12)
- movq 8(%rsp), %r13
- cfi_restore(13)
- movq (%rsp), %r14
- cfi_restore(14)
- movups 48(%rsp), %xmm1
-
- /* Go to exit */
- jmp L(EXIT)
- cfi_offset(12, -64)
- cfi_offset(13, -72)
- cfi_offset(14, -80)
- # LOE rbx rbp r12 r13 r14 r15 xmm1
-
- /* Scalar math fucntion call
- * to process special input
- */
-
-L(SCALAR_MATH_CALL):
- movl %r12d, %r14d
- movss 32(%rsp, %r14, 4), %xmm0
- call log2f@PLT
- # LOE rbx rbp r14 r15 r12d r13d xmm0
- movss %xmm0, 48(%rsp, %r14, 4)
+ /* use rbp as index for special value that is saved across calls
+ to tanhf. We technically don't need a callee save register
+ here as offset to rsp is always [0, 12] so we can restore
+ rsp by realigning to 64. Essentially the tradeoff is 1 extra
+ save/restore vs 2 extra instructions in the loop. */
+ xorl %ebp, %ebp
+ bsfl %ebx, %ebp
+
+ /* Scalar math fucntion call to process special input. */
+ movss 40(%rsp, %rbp, 4), %xmm0
+ call log2f@PLT
- /* Process special inputs in loop */
- jmp L(SPECIAL_VALUES_LOOP)
- # LOE rbx rbp r15 r12d r13d
+ /* No good way to avoid the store-forwarding fault this will
+ cause on return. `lfence` avoids the SF fault but at greater
+ cost as it serialized stack/callee save restoration. */
+ movss %xmm0, 24(%rsp, %rbp, 4)
+
+ leal -1(%rbx), %eax
+ andl %eax, %ebx
+ jnz L(SPECIAL_VALUES_LOOP)
+
+ /* All results have been written to 24(%rsp). */
+ movups 24(%rsp), %xmm0
+ movq (%rsp), %rbx
+ cfi_restore (rbx)
+ movq 8(%rsp), %rbp
+ cfi_restore (rbp)
+ addq $56, %rsp
+ cfi_def_cfa_offset (8)
+ ret
END(_ZGVbN4v_log2f_sse4)
- .section .rodata, "a"
+ .section .rodata.sse4, "a"
.align 16
-#ifdef __svml_slog2_data_internal_typedef
-typedef unsigned int VUINT32;
-typedef struct {
- __declspec(align(16)) VUINT32 MinNorm[4][1];
- __declspec(align(16)) VUINT32 MaxNorm[4][1];
- __declspec(align(16)) VUINT32 iBrkValue[4][1];
- __declspec(align(16)) VUINT32 iOffExpoMask[4][1];
- __declspec(align(16)) VUINT32 One[4][1];
- __declspec(align(16)) VUINT32 sPoly[9][4][1];
-} __svml_slog2_data_internal;
-#endif
-__svml_slog2_data_internal:
- /* MinNorm */
- .long 0x00800000, 0x00800000, 0x00800000, 0x00800000
- /* MaxNorm */
- .align 16
- .long 0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff
- /* iBrkValue = SP 2/3 */
- .align 16
- .long 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab, 0x3f2aaaab
- /* iOffExpoMask = SP significand mask */
- .align 16
- .long 0x007fffff, 0x007fffff, 0x007fffff, 0x007fffff
- /* sOne = SP 1.0 */
- .align 16
- .long 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
- /* spoly[9] */
- .align 16
- .long 0x3e554012, 0x3e554012, 0x3e554012, 0x3e554012 /* coeff9 */
- .long 0xbe638E14, 0xbe638E14, 0xbe638E14, 0xbe638E14 /* coeff8 */
- .long 0x3e4D660B, 0x3e4D660B, 0x3e4D660B, 0x3e4D660B /* coeff7 */
- .long 0xbe727824, 0xbe727824, 0xbe727824, 0xbe727824 /* coeff6 */
- .long 0x3e93DD07, 0x3e93DD07, 0x3e93DD07, 0x3e93DD07 /* coeff5 */
- .long 0xbeB8B969, 0xbeB8B969, 0xbeB8B969, 0xbeB8B969 /* coeff4 */
- .long 0x3eF637C0, 0x3eF637C0, 0x3eF637C0, 0x3eF637C0 /* coeff3 */
- .long 0xbf38AA2B, 0xbf38AA2B, 0xbf38AA2B, 0xbf38AA2B /* coeff2 */
- .long 0x3fB8AA3B, 0x3fB8AA3B, 0x3fB8AA3B, 0x3fB8AA3B /* coeff1 */
- .align 16
- .type __svml_slog2_data_internal, @object
- .size __svml_slog2_data_internal, .-__svml_slog2_data_internal
+LOCAL_DATA_NAME:
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_3, 0x3ef637c0)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_2, 0xbf38aa2b)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_7, 0x3e4d660b)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_6, 0xbe727824)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_9, 0x3e554012)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_8, 0xbe638e14)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_5, 0x3e93dd07)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_4, 0xbeb8b969)
+ DATA_VEC (LOCAL_DATA_NAME, _Coeff_1, 0x3fb8aa3b)
+ .type LOCAL_DATA_NAME, @object
+ .size LOCAL_DATA_NAME, .-LOCAL_DATA_NAME
--
2.34.1
next prev parent reply other threads:[~2022-12-07 8:53 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-07 8:52 [PATCH v1 01/27] x86/fpu: Create helper file for common data macros Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 02/27] x86/fpu: Add file for common data used across svml_s_*_avx2.S files Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 03/27] x86/fpu: Add file for common data used across svml_s_*_avx512.S files Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 04/27] x86/fpu: Add file for common data used across svml_s_*_sse4.S files Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 05/27] x86/fpu: Build common data files for svml_s_*_{avx512,avx2,sse4}.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 06/27] x86/fpu: Update rodata usage in svml_s_tanhf_*_{avx2,sse4} Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 07/27] x86/fpu: Update rodata usage in svml_s_tanhf16_core_avx512.S Noah Goldstein
2022-12-16 17:05 ` H.J. Lu
2022-12-16 18:17 ` Noah Goldstein
2022-12-16 21:37 ` H.J. Lu
2022-12-16 21:51 ` Noah Goldstein
2022-12-16 22:01 ` H.J. Lu
2022-12-16 22:54 ` Sunil Pandey
2023-06-27 18:23 ` Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 08/27] x86/fpu: Update rodata usage in svml_s_atanhf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 09/27] x86/fpu: Update rodata usage in svml_s_atanhf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 10/27] x86/fpu: Update rodata usage in svml_s_atanhf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 11/27] x86/fpu: Optimize svml_s_atanf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 12/27] x86/fpu: Optimize svml_s_atanf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 13/27] x86/fpu: Optimize svml_s_atanf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 14/27] x86/fpu: Add common rodata file for svml_s_tanf_*_{avx512,avx2,sse4}.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 15/27] x86/fpu: Optimize svml_s_tanf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 16/27] x86/fpu: Optimize svml_s_tanf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 17/27] x86/fpu: Optimize svml_s_tanf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 18/27] x86/fpu: Optimize svml_s_log10f16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 19/27] x86/fpu: Optimize svml_s_log10f4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 20/27] x86/fpu: Optimize svml_s_log10f8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 21/27] x86/fpu: Optimize svml_s_log2f16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` Noah Goldstein [this message]
2022-12-07 8:52 ` [PATCH v1 23/27] x86/fpu: Optimize svml_s_log2f8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 24/27] x86/fpu: Optimize svml_s_logf16_core_avx512.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 25/27] x86/fpu: Optimize svml_s_logf4_core_sse4.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 26/27] x86/fpu: Optimize svml_s_logf8_core_avx2.S Noah Goldstein
2022-12-07 8:52 ` [PATCH v1 27/27] x86/fpu: Remove unused svml_s_logf_data.S file Noah Goldstein
2022-12-07 23:53 ` [PATCH v1 01/27] x86/fpu: Create helper file for common data macros H.J. Lu
2022-12-08 0:13 ` Noah Goldstein
2022-12-08 0:22 ` H.J. Lu
2022-12-08 0:46 ` Noah Goldstein
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