From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 391BD3858D32 for ; Sun, 12 Feb 2023 17:02:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 391BD3858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gnu.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gnu.org Received: from fencepost.gnu.org ([2001:470:142:3::e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pRFjx-000171-Of; Sun, 12 Feb 2023 12:02:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=gnu.org; s=fencepost-gnu-org; h=In-Reply-To:MIME-Version:References:Subject:To:From: Date; bh=Yqsyd08POuTVmoD8bMVnH6GJ2eWdJAr+1CBabATxQZM=; b=VpmvHAnBK/Epy4S3lWMP Mi8vvz6aujfCoUJY2Zj//9ddbHYyhhcJuBKEjPo8pgmWYpfh9HyMYJqqK7WdvXkGnslL5d37LZXXN yjMCsg0rcvLfLVlm2ccWrqA0sqGKj7A6Cn34AU/3lpwTxXw4lbVILtTlAMgMbtCc6ts5DZgdBItrz y/SxiIGZBJbhMtPev9NAhcH37dk0M4CUGq77F1VZYZAzLgft0GI1orXgkBHLuwywhVXY0FS3dQZjI p/K/p5Xbgdll4cswbNEpYU3ChUDooniwBuDqfxNpbcvOJXUET0H+F+QwmvkjmXrCkCMrPjAgHJtMd iHY8qt+5VwfeSw==; Received: from lfbn-bor-1-1163-184.w92-158.abo.wanadoo.fr ([92.158.138.184] helo=begin) by fencepost.gnu.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pRFjx-0000iT-GD; Sun, 12 Feb 2023 12:02:13 -0500 Received: from samy by begin with local (Exim 4.96) (envelope-from ) id 1pRFju-005Vqo-2k; Sun, 12 Feb 2023 18:02:10 +0100 Date: Sun, 12 Feb 2023 18:02:10 +0100 From: Samuel Thibault To: Sergey Bugaev Cc: bug-hurd@gnu.org, libc-alpha@sourceware.org, =?utf-8?Q?Fl=C3=A1vio?= Cruz Subject: Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code Message-ID: <20230212170210.rcr3ru7jpvma5euj@begin> Mail-Followup-To: Sergey Bugaev , bug-hurd@gnu.org, libc-alpha@sourceware.org, =?utf-8?Q?Fl=C3=A1vio?= Cruz References: <20230212111044.610942-1-bugaevc@gmail.com> <20230212111044.610942-12-bugaevc@gmail.com> <20230212161153.q4km4h2ql3k5pasp@begin> <20230212163607.47dynpr5rpbohrhe@begin> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Organization: I am not organized User-Agent: NeoMutt/20170609 (1.8.3) X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Sergey Bugaev, le dim. 12 févr. 2023 19:51:33 +0300, a ecrit: > On Sun, Feb 12, 2023 at 7:36 PM Samuel Thibault wrote: > > > > Sergey Bugaev, le dim. 12 févr. 2023 19:25:11 +0300, a ecrit: > > > On Sun, Feb 12, 2023 at 7:11 PM Samuel Thibault wrote: > > > > Sergey Bugaev, le dim. 12 févr. 2023 14:10:42 +0300, a ecrit: > > > > > We should not need a getter routine, because one can simply inspect the target > > > > > thread's state (unless, again, I misunderstand things horribly). > > > > > > > > For 16bit fs/gs values we could read them from userland yes. But for > > > > fs/gs base, the FSGSBASE instruction is not available on all 64bit > > > > processors. And ATM in THREAD_TCB we want to be able to get the base of > > > > another thread. > > > > > > What I've meant is: > > > > > > __thread_get_state (whatever_thread, &state); > > > uintptr_t its_fs_base = state->fs_base; > > > > > > You can't really do the same to *write* [fg]s_base, because doing > > > thread_set_state on your own thread is bound to end badly. > > > > ? Well, sure, just like setting fs/gs through thread state was not done > > for i386. > > > > I don't see where you're aiming. Getting fs/gs from __thread_get_state > > won't actually give you the base, you'll just read something like 0. > > It is my understanding that the actual values of fs/gs (i.e. the index > of a descriptor) are not useful on x86_64. But fs_base and gs_base are > now things that you have to store in the thread state and save/restore > on every context switch. fs_base and gs_base are like registers in > their own right (well, MSRs are registers). Thus, it should be easy to > read them from the state structure exposed by the kernel. Ah, so you mean adding the fs/gs bases to the thread_state content. I'd rather make it a separate state content, like we have a separate i386_DEBUG_STATE content. (And thus no need for a new RPC). Samuel