From: Christoph Muellner <christoph.muellner@vrull.eu>
To: libc-alpha@sourceware.org, Palmer Dabbelt <palmer@dabbelt.com>,
Darius Rad <darius@bluespec.com>,
Andrew Waterman <andrew@sifive.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: "Christoph Müllner" <christoph.muellner@vrull.eu>
Subject: [RFC PATCH 2/2] RISC-V: Attempt to enable TSO mode for TSO binaries
Date: Mon, 27 Nov 2023 15:56:03 +0100 [thread overview]
Message-ID: <20231127145603.2339644-3-christoph.muellner@vrull.eu> (raw)
In-Reply-To: <20231127145603.2339644-1-christoph.muellner@vrull.eu>
From: Christoph Müllner <christoph.muellner@vrull.eu>
The upcoming RISC-V Ssdtso specification introduces a bit in the senvcfg
CSR to switch the memory consistency model at run-time from RVWMO to TSO
(and back). The active consistency model can therefore be switched on a
per-hart base and managed by the kernel on a per-process/thread base.
A RFC kernel patchset has been posted that provides a prctl API to get
and set the current consistency model.
This patch attempts to switch to the TSO consistency model in case
the ELF file requires a TSO machine and the machine does not run
in TSO mode. If the attempt fails, we fall back to the old behaviour
and claim that the ELF file is not compatible with the host.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
sysdeps/riscv/dl-machine.h | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h
index ce537731dd..65be660a76 100644
--- a/sysdeps/riscv/dl-machine.h
+++ b/sysdeps/riscv/dl-machine.h
@@ -24,6 +24,7 @@
#include <entry.h>
#include <elf/elf.h>
#include <sys/asm.h>
+#include <sys/prctl.h>
#include <dl-tls.h>
#include <dl-irel.h>
#include <dl-static-tls.h>
@@ -72,9 +73,19 @@ elf_machine_matches_host (const ElfW(Ehdr) *ehdr)
return 0;
#endif
- /* Execution of TSO binaries is not supported at this time. */
+ /* Execution of TSO binaries depends on machine's consistency model. */
if (ehdr->e_flags & EF_RISCV_TSO)
- return 0;
+ {
+ /* Attempt to get current consistency model. */
+ int ret = prctl(PR_GET_MEMORY_CONSISTENCY_MODEL);
+ if (ret == -1)
+ return 0;
+ /* If we have a mismatch, let's try to switch to TSO. */
+ if (ret != PR_MEMORY_CONSISTENCY_MODEL_RISCV_TSO &&
+ prctl(PR_SET_MEMORY_CONSISTENCY_MODEL,
+ PR_MEMORY_CONSISTENCY_MODEL_RISCV_TSO))
+ return 0;
+ }
return 1;
}
--
2.41.0
prev parent reply other threads:[~2023-11-27 14:56 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 14:56 [RFC PATCH 0/2] RISC-V: Add dynamic TSO support Christoph Muellner
2023-11-27 14:56 ` [RFC PATCH 1/2] RISC-V: Move TSO check to elf_machine_matches_host() Christoph Muellner
2023-11-27 14:56 ` Christoph Muellner [this message]
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