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Fri, 7 Jun 2024 11:46:00 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8037D2004D; Fri, 7 Jun 2024 11:45:58 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 52E8920063; Fri, 7 Jun 2024 11:45:58 +0000 (GMT) Received: from a35lp69.lnxne.boe (unknown [9.152.108.100]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 7 Jun 2024 11:45:58 +0000 (GMT) From: Stefan Liebler To: libc-alpha@sourceware.org Cc: fweimer@redhat.com, devel@otheo.eu, adhemerval.zanella@linaro.org, bergner@linux.ibm.com, Stefan Liebler Subject: [RFC 8/9] elf: Remove LD_HWCAP_MASK / tunable glibc.cpu.hwcap_mask Date: Fri, 7 Jun 2024 13:42:43 +0200 Message-ID: <20240607114543.659306-9-stli@linux.ibm.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240607114543.659306-1-stli@linux.ibm.com> References: <20240607114543.659306-1-stli@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: KzE5CeGnPtQyk1xkmiaMjejXO3TFHGNS X-Proofpoint-ORIG-GUID: 9ldWvnvZKdj2IgD9AAxmBFKXlvnOMar2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-07_06,2024-06-06_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 malwarescore=0 impostorscore=0 mlxlogscore=999 spamscore=0 bulkscore=0 priorityscore=1501 phishscore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406070089 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Remove the environment variable LD_HWCAP_MASK and the tunable glibc.cpu.hwcap_mask as those are not used anymore in common-code after removal in elf/dl-cache.c:search_cache(). The only remaining user is sparc32 where it is used in elf_machine_matches_host(). If sparc32 does not need it anymore, we can get rid of it at all. Otherwise we could also move LD_HWCAP_MASK / tunable glibc.cpu.hwcap_mask to be sparc32 specific. --- elf/dl-tunables.list | 7 ------- elf/tst-env-setuid.c | 1 - manual/README.tunables | 12 ++++++------ manual/tunables.texi | 11 ----------- sysdeps/generic/unsecvars.h | 1 - sysdeps/sparc/sparc32/dl-machine.h | 6 ------ 6 files changed, 6 insertions(+), 32 deletions(-) diff --git a/elf/dl-tunables.list b/elf/dl-tunables.list index 1186272c81..40ac5b3776 100644 --- a/elf/dl-tunables.list +++ b/elf/dl-tunables.list @@ -83,13 +83,6 @@ glibc { minval: 0 } } - cpu { - hwcap_mask { - type: UINT_64 - env_alias: LD_HWCAP_MASK - default: HWCAP_IMPORTANT - } - } elision { enable { diff --git a/elf/tst-env-setuid.c b/elf/tst-env-setuid.c index 43047c48f3..59f2ffeb88 100644 --- a/elf/tst-env-setuid.c +++ b/elf/tst-env-setuid.c @@ -52,7 +52,6 @@ static const struct envvar_t filtered_envvars[] = { { "GLIBC_TUNABLES", FILTERED_VALUE }, { "LD_AUDIT", FILTERED_VALUE }, - { "LD_HWCAP_MASK", FILTERED_VALUE }, { "LD_LIBRARY_PATH", FILTERED_VALUE }, { "LD_PRELOAD", FILTERED_VALUE }, { "LD_PROFILE", PROFILE_LIB }, diff --git a/manual/README.tunables b/manual/README.tunables index 72ae00dc02..594879397b 100644 --- a/manual/README.tunables +++ b/manual/README.tunables @@ -96,11 +96,11 @@ where 'check' is the tunable name and 'val' is a value of same type. To get and set tunables in a different namespace from that module, use the full form of the macros as follows: - val = TUNABLE_GET_FULL (glibc, cpu, hwcap_mask, uint64_t, NULL) + val = TUNABLE_GET_FULL (glibc, malloc, mmap_max, int32_t, NULL) - TUNABLE_SET_FULL (glibc, cpu, hwcap_mask, val) + TUNABLE_SET_FULL (glibc, malloc, mmap_max, val) -where 'glibc' is the top namespace, 'cpu' is the tunable namespace and the +where 'glibc' is the top namespace, 'malloc' is the tunable namespace and the remaining arguments are the same as the short form macros. The minimum and maximum values can updated together with the tunable value @@ -114,11 +114,11 @@ where 'check' is the tunable name, 'val' is a value of same type, 'min' and To set the minimum and maximum values of tunables in a different namespace from that module, use the full form of the macros as follows: - val = TUNABLE_GET_FULL (glibc, cpu, hwcap_mask, uint64_t, NULL) + val = TUNABLE_GET_FULL (glibc, malloc, mmap_max, int32_t, NULL) - TUNABLE_SET_WITH_BOUNDS_FULL (glibc, cpu, hwcap_mask, val, min, max) + TUNABLE_SET_WITH_BOUNDS_FULL (glibc, malloc, mmap_max, val, min, max) -where 'glibc' is the top namespace, 'cpu' is the tunable namespace and the +where 'glibc' is the top namespace, 'malloc' is the tunable namespace and the remaining arguments are the same as the short form macros. When TUNABLE_NAMESPACE is not defined in a module, TUNABLE_GET is equivalent to diff --git a/manual/tunables.texi b/manual/tunables.texi index 8dd02d8149..0b1b2898c0 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -55,7 +55,6 @@ glibc.cpu.x86_non_temporal_threshold: 0xc0000 (min: 0x4040, max: 0xfffffffffffff glibc.cpu.x86_memset_non_temporal_threshold: 0xc0000 (min: 0x4040, max: 0xfffffffffffffff) glibc.cpu.x86_shstk: glibc.pthread.stack_cache_size: 0x2800000 (min: 0x0, max: 0xffffffffffffffff) -glibc.cpu.hwcap_mask: 0x6 (min: 0x0, max: 0xffffffffffffffff) glibc.malloc.mmap_max: 0 (min: 0, max: 2147483647) glibc.elision.skip_trylock_internal_abort: 3 (min: 0, max: 2147483647) glibc.cpu.plt_rewrite: 0 (min: 0, max: 2) @@ -504,16 +503,6 @@ Behavior of @theglibc{} can be tuned to assume specific hardware capabilities by setting the following tunables in the @code{cpu} namespace: @end deftp -@deftp Tunable glibc.cpu.hwcap_mask -This tunable supersedes the @env{LD_HWCAP_MASK} environment variable and is -identical in features. - -The @code{AT_HWCAP} key in the Auxiliary Vector specifies instruction set -extensions available in the processor at runtime for some architectures. The -@code{glibc.cpu.hwcap_mask} tunable allows the user to mask out those -capabilities at runtime, thus disabling use of those extensions. -@end deftp - @deftp Tunable glibc.cpu.hwcaps The @code{glibc.cpu.hwcaps=-xxx,yyy,-zzz...} tunable allows the user to enable CPU/ARCH feature @code{yyy}, disable CPU/ARCH feature @code{xxx} diff --git a/sysdeps/generic/unsecvars.h b/sysdeps/generic/unsecvars.h index f1724efe0f..97857a11aa 100644 --- a/sysdeps/generic/unsecvars.h +++ b/sysdeps/generic/unsecvars.h @@ -12,7 +12,6 @@ "LD_DEBUG\0" \ "LD_DEBUG_OUTPUT\0" \ "LD_DYNAMIC_WEAK\0" \ - "LD_HWCAP_MASK\0" \ "LD_LIBRARY_PATH\0" \ "LD_ORIGIN_PATH\0" \ "LD_PRELOAD\0" \ diff --git a/sysdeps/sparc/sparc32/dl-machine.h b/sysdeps/sparc/sparc32/dl-machine.h index d855c66fe3..2c56d8a80e 100644 --- a/sysdeps/sparc/sparc32/dl-machine.h +++ b/sysdeps/sparc/sparc32/dl-machine.h @@ -39,13 +39,7 @@ elf_machine_matches_host (const Elf32_Ehdr *ehdr) return 1; else if (ehdr->e_machine == EM_SPARC32PLUS) { -#if defined SHARED - uint64_t hwcap_mask = TUNABLE_GET (glibc, cpu, hwcap_mask, uint64_t, - NULL); - return GLRO(dl_hwcap) & hwcap_mask & HWCAP_SPARC_V9; -#else return GLRO(dl_hwcap) & HWCAP_SPARC_V9; -#endif } else return 0; -- 2.45.0