[PATCH v4 0/4] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC

[PATCH v4 0/4] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC

[daichengrong]

From: daichengrong <daichengrong@iscas.ac.cn>

This patch introduces vector support for memcpy with IFUNC.
The implementation select the RVV optimized memcpy version via dl_hwcap.

daichengrong (4):
  add a configure test to check if the compiler supports rvv
  add macro support for dl_hwcap
  add rvv memcpy in ifunc-impl-list
  add riscv vector support for memcpy

 config.h.in                                   |  3 ++
 configure                                     | 35 +++++++++++++++++++
 configure.ac                                  | 25 +++++++++++++
 sysdeps/riscv/multiarch/memcpy_vector.S       | 35 +++++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/Makefile  |  8 +++++
 .../linux/riscv/multiarch/ifunc-impl-list.c   |  9 +++++
 .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  7 ++++
 sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h   | 20 +++++++++++
 8 files changed, 142 insertions(+)
 create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S

-- 
2.25.1

[PATCH v4 1/4] add a configure test to check if the compiler supports rvv

[daichengrong]

From: daichengrong <daichengrong@iscas.ac.cn>

---
 config.h.in  |  3 +++
 configure    | 35 +++++++++++++++++++++++++++++++++++
 configure.ac | 25 +++++++++++++++++++++++++
 3 files changed, 63 insertions(+)

diff --git a/config.h.in b/config.h.in
index cdbd555366..d1e84b6c07 100644
--- a/config.h.in
+++ b/config.h.in
@@ -211,6 +211,9 @@
 /* Define if gcc supports attribute ifunc.  */
 #undef HAVE_GCC_IFUNC
 
+/* Define if gcc supports riscv vector.  */
+#undef HAVE_GCC_RISCV_VECTOR
+
 /* Define if CC supports attribute retain.  */
 #undef HAVE_GNU_RETAIN
 
diff --git a/configure b/configure
index eb8abd0054..58af3a213f 100755
--- a/configure
+++ b/configure
@@ -6375,6 +6375,33 @@ fi
 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_textrel_ifunc" >&5
 printf "%s\n" "$libc_cv_textrel_ifunc" >&6; }
 
+# Check if gcc supports attribute riscv vector.
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for gcc attribute riscv vector support" >&5
+printf %s "checking for gcc attribute riscv vector support... " >&6; }
+if test ${libc_cv_gcc_rvv+y}
+then :
+  printf %s "(cached) " >&6
+else case e in #(
+  e) cat > conftest.c <<EOF
+int used_func (int a)
+{
+  return a;
+}
+static void *resolver ()
+{
+  return &used_func;
+}
+EOF
+libc_cv_gcc_rvv=no
+if ${CC-cc} -march=rv64gcv -c conftest.c -o conftest.o 1>&5 \
+   2>&5 ; then
+  libc_cv_gcc_rvv=yes
+fi
+rm -f conftest* ;;
+esac
+fi
+{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_gcc_rvv" >&5
+printf "%s\n" "$libc_cv_gcc_rvv" >&6; }
 
 # Check if CC supports attribute retain as it is used in attribute_used_retain macro.
 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for GNU attribute retain support" >&5
@@ -8759,6 +8786,14 @@ fi
 config_vars="$config_vars
 have-gcc-ifunc = $libc_cv_gcc_indirect_function"
 
+if test x"$libc_cv_gcc_rvv" = xyes; then
+  printf "%s\n" "#define HAVE_GCC_RISCV_VECTOR 1" >>confdefs.h
+
+fi
+config_vars="$config_vars
+have-gcc-riscv-rvv = $libc_cv_gcc_rvv"
+
+
 # This is far from the AC_ARG_ENABLE that sets it so that a sysdeps
 # configure fragment can override the value to prevent this AC_DEFINE.
 
diff --git a/configure.ac b/configure.ac
index 050bfa65e3..0f8c497e9a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -829,6 +829,31 @@ fi
 rm -f conftest*])
 AC_SUBST(libc_cv_textrel_ifunc)
 
+# Check if gcc supports attribute riscv vector macro.
+AC_CACHE_CHECK([for gcc attribute riscv vector support],
+	       libc_cv_gcc_rvv, [dnl
+cat > conftest.c <<EOF
+int used_func (int a)
+{
+  return a;
+}
+static void *resolver ()
+{
+  return &used_func;
+}
+EOF
+libc_cv_gcc_rvv=no
+if ${CC-cc} -march=rv64gcv -c conftest.c -o conftest.o 1>&AS_MESSAGE_LOG_FD \
+   2>&AS_MESSAGE_LOG_FD ; then
+  libc_cv_gcc_rvv=yes
+fi
+rm -f conftest*])
+
+if test x"$libc_cv_gcc_rvv" = xyes; then
+  AC_DEFINE(HAVE_GCC_RISCV_VECTOR)
+fi
+LIBC_CONFIG_VAR([have-gcc-riscv-rvv], [$libc_cv_gcc_rvv])
+
 # Check if CC supports attribute retain as it is used in attribute_used_retain macro.
 AC_CACHE_CHECK([for GNU attribute retain support],
 	       libc_cv_gnu_retain, [dnl
-- 
2.25.1

[PATCH v4 2/4] add macro support for dl_hwcap

[daichengrong]

From: daichengrong <daichengrong@iscas.ac.cn>

---
 sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h b/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h
index bebad6cf70..250f019766 100644
--- a/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h
+++ b/sysdeps/unix/sysv/linux/riscv/sys/hwprobe.h
@@ -61,6 +61,26 @@ struct riscv_hwprobe {
 
 #endif /* RISCV_HWPROBE_KEY_MVENDORID */
 
+#ifndef _UAPI_ASM_RISCV_HWCAP_H
+#define _UAPI_ASM_RISCV_HWCAP_H
+
+/*
+ * Linux saves the floating-point registers according to the ISA Linux is
+ * executing on, as opposed to the ISA the user program is compiled for.  This
+ * is necessary for a handful of esoteric use cases: for example, userspace
+ * threading libraries must be able to examine the actual machine state in
+ * order to fully reconstruct the state of a thread.
+ */
+#define COMPAT_HWCAP_ISA_I	(1 << ('I' - 'A'))
+#define COMPAT_HWCAP_ISA_M	(1 << ('M' - 'A'))
+#define COMPAT_HWCAP_ISA_A	(1 << ('A' - 'A'))
+#define COMPAT_HWCAP_ISA_F	(1 << ('F' - 'A'))
+#define COMPAT_HWCAP_ISA_D	(1 << ('D' - 'A'))
+#define COMPAT_HWCAP_ISA_C	(1 << ('C' - 'A'))
+#define COMPAT_HWCAP_ISA_V	(1 << ('V' - 'A'))
+
+#endif /* _UAPI_ASM_RISCV_HWCAP_H */
+
 __BEGIN_DECLS
 
 extern int __riscv_hwprobe (struct riscv_hwprobe *__pairs, size_t __pair_count,
-- 
2.25.1

[PATCH v4 3/4] add rvv memcpy in ifunc-impl-list

[daichengrong]

From: daichengrong <daichengrong@iscas.ac.cn>

---
 .../unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c    | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
index 1c1deca8f6..01846a7414 100644
--- a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
+++ b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
@@ -27,6 +27,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
   size_t i = max;
 
   bool fast_unaligned = false;
+  bool rvv_ext = false;
 
   struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_CPUPERF_0 };
   if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
@@ -34,7 +35,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
           == RISCV_HWPROBE_MISALIGNED_FAST)
     fast_unaligned = true;
 
+  pair.key = RISCV_HWPROBE_KEY_IMA_EXT_0;
+  pair.value = 0;
+  if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
+      && (pair.value & RISCV_HWPROBE_IMA_V) == RISCV_HWPROBE_IMA_V)
+    rvv_ext = true;
+
   IFUNC_IMPL (i, name, memcpy,
+	      IFUNC_IMPL_ADD (array, i, memcpy, rvv_ext,
+			      __memcpy_vector)
 	      IFUNC_IMPL_ADD (array, i, memcpy, fast_unaligned,
 			      __memcpy_noalignment)
 	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic))
-- 
2.25.1

[PATCH v4 4/4] add riscv vector support for memcpy

[daichengrong]

From: daichengrong <daichengrong@iscas.ac.cn>

Changes in v4:
  update rvv memcpy support by compiler 
  check whether rvv enabled by dl_hwcap

Changes in v3:
  Remove unnecessary whitespace
  
Changes in v2:
  delete size-0 branch

---
 sysdeps/riscv/multiarch/memcpy_vector.S       | 35 +++++++++++++++++++
 .../unix/sysv/linux/riscv/multiarch/Makefile  |  8 +++++
 .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  7 ++++
 3 files changed, 50 insertions(+)
 create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S

diff --git a/sysdeps/riscv/multiarch/memcpy_vector.S b/sysdeps/riscv/multiarch/memcpy_vector.S
new file mode 100644
index 0000000000..8fddab8432
--- /dev/null
+++ b/sysdeps/riscv/multiarch/memcpy_vector.S
@@ -0,0 +1,35 @@
+/* memcpy for RISC-V Vector.
+   Copyright (C) 2024-2025 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+
+#include <sysdep.h>
+#include <sys/asm.h>
+
+ENTRY (__memcpy_vector)
+    mv	    a6, a0
+L(loop):
+    vsetvli a3,a2,e8,m8,ta,mu
+    vle8.v  v8,(a1)
+    vse8.v  v8,(a6)
+    add     a1,a1,a3
+    sub     a2,a2,a3
+    add     a6,a6,a3
+    bnez    a2,L(loop)
+L(ret):
+    ret
+END (__memcpy_vector)
diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
index fcef5659d4..394033e077 100644
--- a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
+++ b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
@@ -5,5 +5,13 @@ sysdep_routines += \
   memcpy_noalignment \
   # sysdep_routines
 
+ifeq ($(have-gcc-riscv-rvv),yes)
+sysdep_routines += \
+  memcpy_vector \
+  # rvv sysdep_routines
+  
+ASFLAGS-memcpy_vector.S += -march=rv64gcv
+endif
+
 CFLAGS-memcpy_noalignment.c += -mno-strict-align
 endif
diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c b/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
index 8544f5402a..4d1fa2073d 100644
--- a/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
+++ b/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
@@ -32,11 +32,18 @@ extern __typeof (__redirect_memcpy) __libc_memcpy;
 
 extern __typeof (__redirect_memcpy) __memcpy_generic attribute_hidden;
 extern __typeof (__redirect_memcpy) __memcpy_noalignment attribute_hidden;
+extern __typeof (__redirect_memcpy) __memcpy_vector attribute_hidden;
 
 static inline __typeof (__redirect_memcpy) *
 select_memcpy_ifunc (uint64_t dl_hwcap, __riscv_hwprobe_t hwprobe_func)
 {
   unsigned long long int v;
+
+#if defined(HAVE_GCC_RISCV_VECTOR) 
+	if (dl_hwcap & COMPAT_HWCAP_ISA_V) 
+    return __memcpy_vector;
+#endif
+
   if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_CPUPERF_0, &v) == 0
       && (v & RISCV_HWPROBE_MISALIGNED_MASK) == RISCV_HWPROBE_MISALIGNED_FAST)
     return __memcpy_noalignment;
-- 
2.25.1

Re: [PATCH v4 1/4] add a configure test to check if the compiler supports rvv

[Adhemerval Zanella Netto]

On 21/01/25 23:03, daichengrong@iscas.ac.cn wrote:
> From: daichengrong <daichengrong@iscas.ac.cn>
> 
> ---
>  config.h.in  |  3 +++
>  configure    | 35 +++++++++++++++++++++++++++++++++++
>  configure.ac | 25 +++++++++++++++++++++++++
>  3 files changed, 63 insertions(+)
> 
> diff --git a/config.h.in b/config.h.in
> index cdbd555366..d1e84b6c07 100644
> --- a/config.h.in
> +++ b/config.h.in
> @@ -211,6 +211,9 @@
>  /* Define if gcc supports attribute ifunc.  */
>  #undef HAVE_GCC_IFUNC
>  
> +/* Define if gcc supports riscv vector.  */
> +#undef HAVE_GCC_RISCV_VECTOR
> +
>  /* Define if CC supports attribute retain.  */
>  #undef HAVE_GNU_RETAIN
>  
> diff --git a/configure b/configure
> index eb8abd0054..58af3a213f 100755
> --- a/configure
> +++ b/configure
> @@ -6375,6 +6375,33 @@ fi
>  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_textrel_ifunc" >&5
>  printf "%s\n" "$libc_cv_textrel_ifunc" >&6; }
>  
> +# Check if gcc supports attribute riscv vector.
> +{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for gcc attribute riscv vector support" >&5
> +printf %s "checking for gcc attribute riscv vector support... " >&6; }
> +if test ${libc_cv_gcc_rvv+y}
> +then :
> +  printf %s "(cached) " >&6
> +else case e in #(
> +  e) cat > conftest.c <<EOF
> +int used_func (int a)
> +{
> +  return a;
> +}
> +static void *resolver ()
> +{
> +  return &used_func;
> +}
> +EOF
> +libc_cv_gcc_rvv=no
> +if ${CC-cc} -march=rv64gcv -c conftest.c -o conftest.o 1>&5 \
> +   2>&5 ; then
> +  libc_cv_gcc_rvv=yes
> +fi
> +rm -f conftest* ;;
> +esac
> +fi
> +{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_gcc_rvv" >&5
> +printf "%s\n" "$libc_cv_gcc_rvv" >&6; }
>  
>  # Check if CC supports attribute retain as it is used in attribute_used_retain macro.
>  { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for GNU attribute retain support" >&5
> @@ -8759,6 +8786,14 @@ fi
>  config_vars="$config_vars
>  have-gcc-ifunc = $libc_cv_gcc_indirect_function"
>  
> +if test x"$libc_cv_gcc_rvv" = xyes; then
> +  printf "%s\n" "#define HAVE_GCC_RISCV_VECTOR 1" >>confdefs.h
> +
> +fi
> +config_vars="$config_vars
> +have-gcc-riscv-rvv = $libc_cv_gcc_rvv"
> +
> +
>  # This is far from the AC_ARG_ENABLE that sets it so that a sysdeps
>  # configure fragment can override the value to prevent this AC_DEFINE.
>  
> diff --git a/configure.ac b/configure.ac
> index 050bfa65e3..0f8c497e9a 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -829,6 +829,31 @@ fi
>  rm -f conftest*])
>  AC_SUBST(libc_cv_textrel_ifunc)
>  
> +# Check if gcc supports attribute riscv vector macro.
> +AC_CACHE_CHECK([for gcc attribute riscv vector support],
> +	       libc_cv_gcc_rvv, [dnl
> +cat > conftest.c <<EOF
> +int used_func (int a)
> +{
> +  return a;
> +}
> +static void *resolver ()
> +{
> +  return &used_func;
> +}
> +EOF
> +libc_cv_gcc_rvv=no
> +if ${CC-cc} -march=rv64gcv -c conftest.c -o conftest.o 1>&AS_MESSAGE_LOG_FD \
> +   2>&AS_MESSAGE_LOG_FD ; then
> +  libc_cv_gcc_rvv=yes
> +fi
> +rm -f conftest*])
> +
> +if test x"$libc_cv_gcc_rvv" = xyes; then
> +  AC_DEFINE(HAVE_GCC_RISCV_VECTOR)
> +fi
> +LIBC_CONFIG_VAR([have-gcc-riscv-rvv], [$libc_cv_gcc_rvv])

Strictly you only need to check if assembler supports -march=rv64gcv, and I think
it would be better to move it to sysdeps/riscv/configure.ac

> +
>  # Check if CC supports attribute retain as it is used in attribute_used_retain macro.
>  AC_CACHE_CHECK([for GNU attribute retain support],
>  	       libc_cv_gnu_retain, [dnl

Re: [PATCH v4 3/4] add rvv memcpy in ifunc-impl-list

[Adhemerval Zanella Netto]

On 21/01/25 23:04, daichengrong@iscas.ac.cn wrote:
> From: daichengrong <daichengrong@iscas.ac.cn>

This patch should be squashed with the last one, otherwise this will break
glibc build.

> 
> ---
>  .../unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c    | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> index 1c1deca8f6..01846a7414 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> @@ -27,6 +27,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
>    size_t i = max;
>  
>    bool fast_unaligned = false;
> +  bool rvv_ext = false;
>  
>    struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_CPUPERF_0 };
>    if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
> @@ -34,7 +35,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
>            == RISCV_HWPROBE_MISALIGNED_FAST)
>      fast_unaligned = true;
>  
> +  pair.key = RISCV_HWPROBE_KEY_IMA_EXT_0;
> +  pair.value = 0;
> +  if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
> +      && (pair.value & RISCV_HWPROBE_IMA_V) == RISCV_HWPROBE_IMA_V)
> +    rvv_ext = true;

Maybe issue only one __riscv_hwprobe? Afaiu its idea is to allow query multiple
hardware support with only one call.

> +
>    IFUNC_IMPL (i, name, memcpy,
> +	      IFUNC_IMPL_ADD (array, i, memcpy, rvv_ext,
> +			      __memcpy_vector)
>  	      IFUNC_IMPL_ADD (array, i, memcpy, fast_unaligned,
>  			      __memcpy_noalignment)
>  	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic))

Re: [PATCH v4 4/4] add riscv vector support for memcpy

[Adhemerval Zanella Netto]

On 21/01/25 23:04, daichengrong@iscas.ac.cn wrote:
> From: daichengrong <daichengrong@iscas.ac.cn>
> 
> Changes in v4:
>   update rvv memcpy support by compiler 
>   check whether rvv enabled by dl_hwcap
> 
> Changes in v3:
>   Remove unnecessary whitespace
>   
> Changes in v2:
>   delete size-0 branch

As before, usually we provide optimization backed up with some performance
numbers on real hardware.  

> 
> ---
>  sysdeps/riscv/multiarch/memcpy_vector.S       | 35 +++++++++++++++++++
>  .../unix/sysv/linux/riscv/multiarch/Makefile  |  8 +++++
>  .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  7 ++++
>  3 files changed, 50 insertions(+)
>  create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S
> 
> diff --git a/sysdeps/riscv/multiarch/memcpy_vector.S b/sysdeps/riscv/multiarch/memcpy_vector.S
> new file mode 100644
> index 0000000000..8fddab8432
> --- /dev/null
> +++ b/sysdeps/riscv/multiarch/memcpy_vector.S
> @@ -0,0 +1,35 @@
> +/* memcpy for RISC-V Vector.
> +   Copyright (C) 2024-2025 Free Software Foundation, Inc.
> +   This file is part of the GNU C Library.
> +
> +   The GNU C Library is free software; you can redistribute it and/or
> +   modify it under the terms of the GNU Lesser General Public
> +   License as published by the Free Software Foundation; either
> +   version 2.1 of the License, or (at your option) any later version.
> +
> +   The GNU C Library is distributed in the hope that it will be useful,
> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   Lesser General Public License for more details.
> +
> +   You should have received a copy of the GNU Lesser General Public
> +   License along with the GNU C Library; if not, see
> +   <https://www.gnu.org/licenses/>.  */
> +
> +
> +#include <sysdep.h>
> +#include <sys/asm.h>
> +
> +ENTRY (__memcpy_vector)
> +    mv	    a6, a0
> +L(loop):
> +    vsetvli a3,a2,e8,m8,ta,mu
> +    vle8.v  v8,(a1)
> +    vse8.v  v8,(a6)
> +    add     a1,a1,a3
> +    sub     a2,a2,a3
> +    add     a6,a6,a3
> +    bnez    a2,L(loop)
> +L(ret):
> +    ret
> +END (__memcpy_vector)
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
> index fcef5659d4..394033e077 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
> @@ -5,5 +5,13 @@ sysdep_routines += \
>    memcpy_noalignment \
>    # sysdep_routines
>  
> +ifeq ($(have-gcc-riscv-rvv),yes)
> +sysdep_routines += \
> +  memcpy_vector \
> +  # rvv sysdep_routines
> +  
> +ASFLAGS-memcpy_vector.S += -march=rv64gcv
> +endif
> +
>  CFLAGS-memcpy_noalignment.c += -mno-strict-align
>  endif
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c b/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
> index 8544f5402a..4d1fa2073d 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
> @@ -32,11 +32,18 @@ extern __typeof (__redirect_memcpy) __libc_memcpy;
>  
>  extern __typeof (__redirect_memcpy) __memcpy_generic attribute_hidden;
>  extern __typeof (__redirect_memcpy) __memcpy_noalignment attribute_hidden;
> +extern __typeof (__redirect_memcpy) __memcpy_vector attribute_hidden;
>  
>  static inline __typeof (__redirect_memcpy) *
>  select_memcpy_ifunc (uint64_t dl_hwcap, __riscv_hwprobe_t hwprobe_func)
>  {
>    unsigned long long int v;
> +
> +#if defined(HAVE_GCC_RISCV_VECTOR) 
> +	if (dl_hwcap & COMPAT_HWCAP_ISA_V) 
> +    return __memcpy_vector;
> +#endif

Indentation seems off here.

> +
>    if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_CPUPERF_0, &v) == 0
>        && (v & RISCV_HWPROBE_MISALIGNED_MASK) == RISCV_HWPROBE_MISALIGNED_FAST)
>      return __memcpy_noalignment;

Re: [PATCH v4 3/4] add rvv memcpy in ifunc-impl-list

[Darius Rad]

On Wed, Jan 22, 2025 at 10:04:00AM +0800, daichengrong@iscas.ac.cn wrote:
> From: daichengrong <daichengrong@iscas.ac.cn>
> 
> ---
>  .../unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c    | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> index 1c1deca8f6..01846a7414 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> @@ -27,6 +27,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
>    size_t i = max;
>  
>    bool fast_unaligned = false;
> +  bool rvv_ext = false;
>  
>    struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_CPUPERF_0 };
>    if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
> @@ -34,7 +35,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
>            == RISCV_HWPROBE_MISALIGNED_FAST)
>      fast_unaligned = true;
>  
> +  pair.key = RISCV_HWPROBE_KEY_IMA_EXT_0;
> +  pair.value = 0;
> +  if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
> +      && (pair.value & RISCV_HWPROBE_IMA_V) == RISCV_HWPROBE_IMA_V)
> +    rvv_ext = true;

This should use hwcap as well.

> +
>    IFUNC_IMPL (i, name, memcpy,
> +	      IFUNC_IMPL_ADD (array, i, memcpy, rvv_ext,
> +			      __memcpy_vector)
>  	      IFUNC_IMPL_ADD (array, i, memcpy, fast_unaligned,
>  			      __memcpy_noalignment)
>  	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic))
> -- 
> 2.25.1
>