From: daichengrong@iscas.ac.cn
To: libc-alpha@sourceware.org
Cc: aswaterman@gmail.com, palmer@rivosinc.com,
adhemerval.zanella@linaro.org, darius@bluespec.com,
jiageng08@iscas.ac.cn, enh@google.com
Subject: [PATCH v7 0/2] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC
Date: Fri, 21 Feb 2025 17:57:38 +0800 [thread overview]
Message-ID: <20250221095740.582183-1-daichengrong@iscas.ac.cn> (raw)
From: daichengrong <daichengrong@iscas.ac.cn>
Change in v7:
update dl_hwcap support using kernel header
update rvv memcpy compile with option,+v
delete optimization for small lengths
This patch introduces vector support for memcpy with IFUNC.
The implementation selects the RVV optimized memcpy version via dl_hwcap.
daichengrong (2):
check rvv support in asm at sysdeps/riscv
add riscv vector support for memcpy
config.h.in | 3 ++
sysdeps/riscv/configure | 35 ++++++++++++++++++
sysdeps/riscv/configure.ac | 25 +++++++++++++
sysdeps/riscv/multiarch/memcpy_vector.S | 37 +++++++++++++++++++
.../unix/sysv/linux/riscv/multiarch/Makefile | 6 +++
.../linux/riscv/multiarch/ifunc-impl-list.c | 14 +++++++
.../unix/sysv/linux/riscv/multiarch/memcpy.c | 8 ++++
7 files changed, 128 insertions(+)
mode change 100644 => 100755 sysdeps/riscv/configure
create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S
--
2.25.1
next reply other threads:[~2025-02-21 9:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 9:57 daichengrong [this message]
2025-02-21 9:57 ` [PATCH v7 1/2] RISC-V: check rvv support in asm at sysdeps/riscv daichengrong
2025-02-21 9:57 ` [PATCH v7 2/2] RISC-V: add riscv vector support for memcpy daichengrong
2025-02-22 9:11 ` Anton Blanchard
2025-03-07 9:24 ` daichengrong
2025-08-16 4:41 ` Vineet Gupta
2025-08-16 16:55 ` Palmer Dabbelt
2025-03-04 2:50 ` [PATCH v7 0/2] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC daichengrong
2025-03-04 2:54 ` Xi Ruoyao
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