From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp-out3.simply.com (smtp-out3.simply.com [94.231.106.210]) by sourceware.org (Postfix) with ESMTPS id BC5CD386183D for ; Thu, 15 Feb 2024 09:31:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BC5CD386183D Authentication-Results: sourceware.org; dmarc=pass (p=reject dis=none) header.from=gaisler.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gaisler.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org BC5CD386183D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=94.231.106.210 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707989494; cv=none; b=K34zW6M9sB9sByFSsXtqvQr4mt3kRD3oz0pyGFT2jcpIrohIJjMQf/6WUO49lAsIDQM3JE/VW+f5HFcFNQnn+7Jzfx6e0vOXZGc2+CDAHqcESfo7/CoA04afWOub4kftUjlR1AFmnFIkoyTBPHNksyW2q7D7NuO/BD/4JpogIMU= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1707989494; c=relaxed/simple; bh=F/k/SNV9pNkQyvlvhxR/LdZd93x06RXDcUHGolBM9IA=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:To:From; b=oVlKmzLUapJ6MayxaTkovZiIFJsqYrGXHL6LaclGPkeMYWMCwRo29bby9v2Z6Zkv/JppDs2/1IJxedm4agXuIhguAoszFeVj+sOSSkCJqjQftrhc0YS+OmBpDoYKEXr5dtUHvub81I3Dcs59ade+wgDtvz2d95N3lNS8BsRqqFw= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost (localhost [127.0.0.1]) by smtp.simply.com (Simply.com) with ESMTP id 4Tb8vk3d0Hz67wm; Thu, 15 Feb 2024 10:31:30 +0100 (CET) Received: from [192.168.0.86] (h-98-128-223-123.NA.cust.bahnhof.se [98.128.223.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by smtp.simply.com (Simply.com) with ESMTPSA id 4Tb8vg1m0Dz67VM; Thu, 15 Feb 2024 10:31:26 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gaisler.com; s=unoeuro; t=1707989490; bh=Y5GbyVH66jMKYxp+jSURv69RnKq3BZlLFQ5z/uGLAaE=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=H1o3uIe6W55uyimI6WWqAmT7RKzFvPehjECyRM2V4pxnU1NnLzvDkAmyw9o1N3PWG E40Q6xk6NSvoFSk/A1tXbjHcWSM08g8zZUZh/9qvt7aDeikwofsgweaeeYiMP2elEO zIkpf/vMkQMvTYusT1e5jGLGmdgs4DSNI02Sn4xE= Message-ID: <318b9a72-e84c-41a5-a0ac-684bfcb02007@gaisler.com> Date: Thu, 15 Feb 2024 10:31:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] sparc: Treat the version field in the FPU control word as reserved Content-Language: en-US To: Adhemerval Zanella Netto , libc-alpha@sourceware.org Cc: daniel@gaisler.com, andreas@gaisler.com References: <20240112092628.2464455-1-cederman@gaisler.com> <20240112092628.2464455-4-cederman@gaisler.com> <74d588e4-69cc-4f66-924a-029ae257776c@linaro.org> From: Daniel Cederman Organization: Frontgrade Gaisler AB In-Reply-To: <74d588e4-69cc-4f66-924a-029ae257776c@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-13.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hello Adhemerval, Can you apply this to master if you are ok with the patch? /Daniel On 2024-01-12 18:42, Adhemerval Zanella Netto wrote: > > > On 12/01/24 06:26, Daniel Cederman wrote: >> The FSR version field is read-only and might be non-zero. >> >> This allows math/test-fpucw* to correctly pass when the version is >> non-zero. >> >> Signed-off-by: Daniel Cederman > > It looks reasonable to mask off the version _FPU_RESERVED. It also > means that it would be change by __setfpucw, although afaik the ISA > guarantee that it can not be changed anyway. > > Reviewed-by: Adhemerval Zanella > >> --- >> sysdeps/sparc/fpu/fpu_control.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/sysdeps/sparc/fpu/fpu_control.h b/sysdeps/sparc/fpu/fpu_control.h >> index 9313743f86..36a2bf5d07 100644 >> --- a/sysdeps/sparc/fpu/fpu_control.h >> +++ b/sysdeps/sparc/fpu/fpu_control.h >> @@ -42,7 +42,7 @@ >> #define _FPU_RC_ZERO 0x40000000 >> #define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */ >> >> -#define _FPU_RESERVED 0x30300000 /* Reserved bits in cw */ >> +#define _FPU_RESERVED 0x303e0000 /* Reserved bits in cw */ >> >> >> /* Now two recommended cw */