From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by sourceware.org (Postfix) with ESMTPS id 426F93858D1E for ; Thu, 22 Dec 2022 05:34:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 426F93858D1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-pf1-x434.google.com with SMTP id g1so510058pfk.2 for ; Wed, 21 Dec 2022 21:34:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=NCvsOMVyu33EiuAgfN+FUTCv48Y5LFF5xmGYl6cbsZ8=; b=posl3ujUfmEnbuhJ4wbgrQwA4tveQ8r275wCkAOUBHNF62AC516BykEVe3CLkhOEkQ Qv0z15P1h+gRtM7cvOqWPAxWABV/341zuKwhDJ7nY8K24q0sbgyW+Q3rFVX7PSaNJqFg zCsRBxk0dH5YtUfOxoGlbe/t/SQfdY1laSCR+FocZ78RVv00oCdQ5eN5hJBvETwiRacy PnauCn6H7FVTZLN5pdC5aLtALBWz6tk480K9UAVIp0LOGo4qKw0sLBdUTcr6Pe6XbJwb jk704pNet0Tqa9BS3CTQT4pQmGkUIbun8VMfw2qtVV2fpsEbl4aAak4HfVuEsaFc3Emu hQfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=NCvsOMVyu33EiuAgfN+FUTCv48Y5LFF5xmGYl6cbsZ8=; b=mcwAYn2ESFQZ5xjixQh4IAq0XIaJvvPlQDJav22+ZZNvGvBb1LNeWXbAOuPnQODNc2 SrW6qub6Zis3OEdSXctpP1NjliuBMpXwb6Y8651ZtwL4l1sw4gOnTPCFtmZPtfS/jYFi 81DnieTFVoDy+vwNVyF26xeUfRndSpSKlKTQbmXFT9xj6NvyfQma9toRtgWZN8xzjFHl HReXNWMlRTooFQD1xDnhxHmBCN0F1X/SV8xXz4pSPGiU8j8o6ZIp7hQrGpKvOxp/eGur tB/GJqUOW3mBZxxwWJlnXNp8EU++eLNR7NAcGuRhJQeTsdLJvTJ59vWjWn+m8lZ9JEfh MMvg== X-Gm-Message-State: AFqh2krX+pkM3/YNGksLNAb5/IRfoFtIP4yGV6ZtvsQnhwXBpOraDYyL v9CWUwPRWyybHx+qJBJegCepjQ== X-Google-Smtp-Source: AMrXdXvJDhwA/xe0qthSaNRvP+uY/2elloYhctIze+8lvzMhgIzDor8thyir5QD8gt43N/qyO1hI+w== X-Received: by 2002:a05:6a00:1caa:b0:57f:ca45:5fef with SMTP id y42-20020a056a001caa00b0057fca455fefmr5034136pfw.30.1671687279302; Wed, 21 Dec 2022 21:34:39 -0800 (PST) Received: from ?IPV6:2602:47:d48c:8101:716e:2242:a3b5:8079? ([2602:47:d48c:8101:716e:2242:a3b5:8079]) by smtp.gmail.com with ESMTPSA id k10-20020aa79d0a000000b00575da69a16asm11925339pfp.179.2022.12.21.21.34.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Dec 2022 21:34:38 -0800 (PST) Message-ID: <34d0ac75-26a5-6fe3-1b21-efea1e2e88a5@linaro.org> Date: Wed, 21 Dec 2022 21:34:36 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Content-Language: en-US To: Vineet Gupta , Vincent Chen Cc: Florian Weimer , Rich Felker , Andrew Waterman , Palmer Dabbelt , Kito Cheng , =?UTF-8?Q?Christoph_M=c3=bcllner?= , davidlt@rivosinc.com, Arnd Bergmann , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Philipp Tomsich , Szabolcs Nagy , Andy Chiu , Greentime Hu , Aaron Durbin , Andrew de los Reyes , linux-riscv , GNU C Library References: <1631497278-29829-1-git-send-email-vincent.chen@sifive.com> <1631497278-29829-3-git-send-email-vincent.chen@sifive.com> <871r5sd1zq.fsf@oldenburg.str.redhat.com> <20210913135247.GL13220@brightrain.aerifal.cx> <87sfy5ndid.fsf@oldenburg.str.redhat.com> <73c0124c-4794-6e40-460c-b26df407f322@rivosinc.com> <50c598a6-e3b3-3062-abe7-23a406067533@rivosinc.com> From: Richard Henderson In-Reply-To: <50c598a6-e3b3-3062-abe7-23a406067533@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 12/21/22 11:45, Vineet Gupta wrote: >> + __extension__ union { >> + unsigned long long int fpregs[66] __attribute__ ((__aligned__ (16))); >> + /* Kernel uses struct __riscv_fp_state to save f0-f31 and fcsr >> + to the signal context, so please use sc_fpregs to access these >> + fpu registers from the signal context. */ >> + union __riscv_fp_state sc_fpregs; >> + }; >> + >> + __u8 sc_extn[] __attribute__((__aligned__(16))); >>   }; >> >>   #endif >> >> >> This change can reduce memory waste size to 16 bytes in the worst >> case. The best case happens when the sc_extn locates at a 16-byte >> aligned address. The size of the struct sigcontext is still the same. > > Its a neat trick. But the additional stack alignment means we could still potentially > changing the size of sigcontext - even if by 16 bytes - again for existing binaries. The riscv sigcontext is already aligned by 16, via __riscv_q_ext_state, fwiw. r~