From: Alistair Francis <alistair.francis@wdc.com>
To: libc-alpha@sourceware.org
Cc: alistair.francis@wdc.com, alistair23@gmail.com
Subject: [PATCH v3 15/19] RISC-V: Build Infastructure for 32-bit
Date: Sun, 12 Jul 2020 08:48:00 -0700 [thread overview]
Message-ID: <3bc3074d7ae29928b90efd584f018cc9da3b42db.1594568655.git.alistair.francis@wdc.com> (raw)
In-Reply-To: <cover.1594568655.git.alistair.francis@wdc.com>
From: Zong Li <zongbox@gmail.com>
This patch lays out the top-level orginazition of the RISC-V 32-bit port. It
contains all the Implies files as well as various other fragments of
build infastructure for the RISC-V 32-bit port.
---
sysdeps/riscv/preconfigure | 6 +--
sysdeps/riscv/rv32/Implies-after | 1 +
sysdeps/riscv/rv32/rvd/Implies | 3 ++
sysdeps/riscv/rv32/rvf/Implies | 1 +
sysdeps/unix/sysv/linux/riscv/Makefile | 4 +-
sysdeps/unix/sysv/linux/riscv/configure | 39 ++++++++++++++++++++
sysdeps/unix/sysv/linux/riscv/configure.ac | 8 ++++
sysdeps/unix/sysv/linux/riscv/rv32/Implies | 3 ++
sysdeps/unix/sysv/linux/riscv/shlib-versions | 10 ++++-
9 files changed, 67 insertions(+), 8 deletions(-)
create mode 100644 sysdeps/riscv/rv32/Implies-after
create mode 100644 sysdeps/riscv/rv32/rvd/Implies
create mode 100644 sysdeps/riscv/rv32/rvf/Implies
create mode 100644 sysdeps/unix/sysv/linux/riscv/rv32/Implies
diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure
index d9adb31b64..1ab5d20f0e 100644
--- a/sysdeps/riscv/preconfigure
+++ b/sysdeps/riscv/preconfigure
@@ -6,11 +6,7 @@ riscv*)
atomic=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_atomic' | cut -d' ' -f2`
case "$xlen" in
- 32)
- echo "glibc does not yet support 32-bit systems" >&2
- exit 1
- ;;
- 64)
+ 64 | 32)
;;
*)
echo "Unable to determine XLEN" >&2
diff --git a/sysdeps/riscv/rv32/Implies-after b/sysdeps/riscv/rv32/Implies-after
new file mode 100644
index 0000000000..39a34c5f57
--- /dev/null
+++ b/sysdeps/riscv/rv32/Implies-after
@@ -0,0 +1 @@
+wordsize-32
diff --git a/sysdeps/riscv/rv32/rvd/Implies b/sysdeps/riscv/rv32/rvd/Implies
new file mode 100644
index 0000000000..1151214e8f
--- /dev/null
+++ b/sysdeps/riscv/rv32/rvd/Implies
@@ -0,0 +1,3 @@
+riscv/rv32/rvf
+riscv/rvd
+riscv/rvf
diff --git a/sysdeps/riscv/rv32/rvf/Implies b/sysdeps/riscv/rv32/rvf/Implies
new file mode 100644
index 0000000000..66c401443b
--- /dev/null
+++ b/sysdeps/riscv/rv32/rvf/Implies
@@ -0,0 +1 @@
+riscv/rvf
diff --git a/sysdeps/unix/sysv/linux/riscv/Makefile b/sysdeps/unix/sysv/linux/riscv/Makefile
index 301b082398..6c11f7fd9a 100644
--- a/sysdeps/unix/sysv/linux/riscv/Makefile
+++ b/sysdeps/unix/sysv/linux/riscv/Makefile
@@ -7,11 +7,13 @@ ifeq ($(subdir),stdlib)
gen-as-const-headers += ucontext_i.sym
endif
-abi-variants := lp64 lp64d
+abi-variants := ilp32 ilp32d lp64 lp64d
ifeq (,$(filter $(default-abi),$(abi-variants)))
$(error Unknown ABI $(default-abi), must be one of $(abi-variants))
endif
+abi-ilp32-condition := !defined __LP64__ && defined __riscv_float_abi_soft
+abi-ilp32d-condition := !defined __LP64__ && defined __riscv_float_abi_double
abi-lp64-condition := defined __LP64__ && defined __riscv_float_abi_soft
abi-lp64d-condition := defined __LP64__ && defined __riscv_float_abi_double
diff --git a/sysdeps/unix/sysv/linux/riscv/configure b/sysdeps/unix/sysv/linux/riscv/configure
index 3018ca8f1b..2b3c77f18c 100755
--- a/sysdeps/unix/sysv/linux/riscv/configure
+++ b/sysdeps/unix/sysv/linux/riscv/configure
@@ -147,6 +147,17 @@ if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
fi
rm -f conftest*
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h. */
+__SIZEOF_INT__ __SIZEOF_LONG__ __SIZEOF_POINTER__
+
+_ACEOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ $EGREP "4 4 4" >/dev/null 2>&1; then :
+ libc_cv_riscv_int_abi=ilp32
+fi
+rm -f conftest*
+
if test $libc_cv_riscv_int_abi = no; then
as_fn_error $? "Unable to determine integer ABI" "$LINENO" 5
fi
@@ -214,6 +225,34 @@ case "$prefix" in
;;
esac
;;
+ilp32-riscv/rv32/*)
+ test -n "$libc_cv_slibdir" ||
+case "$prefix" in
+/usr | /usr/)
+ libc_cv_slibdir='/lib32/ilp32'
+ libc_cv_rtlddir='/lib'
+ if test "$libdir" = '${exec_prefix}/lib'; then
+ libdir='${exec_prefix}/lib32/ilp32';
+ # Locale data can be shared between 32-bit and 64-bit libraries.
+ libc_cv_complocaledir='${exec_prefix}/lib/locale'
+ fi
+ ;;
+esac
+ ;;
+ilp32d-riscv/rv32/*)
+ test -n "$libc_cv_slibdir" ||
+case "$prefix" in
+/usr | /usr/)
+ libc_cv_slibdir='/lib32/ilp32d'
+ libc_cv_rtlddir='/lib'
+ if test "$libdir" = '${exec_prefix}/lib'; then
+ libdir='${exec_prefix}/lib32/ilp32d';
+ # Locale data can be shared between 32-bit and 64-bit libraries.
+ libc_cv_complocaledir='${exec_prefix}/lib/locale'
+ fi
+ ;;
+esac
+ ;;
esac
ldd_rewrite_script=sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed
diff --git a/sysdeps/unix/sysv/linux/riscv/configure.ac b/sysdeps/unix/sysv/linux/riscv/configure.ac
index d4819931ca..710d46afcd 100644
--- a/sysdeps/unix/sysv/linux/riscv/configure.ac
+++ b/sysdeps/unix/sysv/linux/riscv/configure.ac
@@ -7,6 +7,8 @@ arch_minimum_kernel=4.15.0
libc_cv_riscv_int_abi=no
AC_EGREP_CPP(4 8 8, [__SIZEOF_INT__ __SIZEOF_LONG__ __SIZEOF_POINTER__
], libc_cv_riscv_int_abi=lp64)
+AC_EGREP_CPP(4 4 4, [__SIZEOF_INT__ __SIZEOF_LONG__ __SIZEOF_POINTER__
+ ], libc_cv_riscv_int_abi=ilp32)
if test $libc_cv_riscv_int_abi = no; then
AC_MSG_ERROR([Unable to determine integer ABI])
fi
@@ -33,6 +35,12 @@ lp64-riscv/rv64/*)
lp64d-riscv/rv64/*)
LIBC_SLIBDIR_RTLDDIR([lib64/lp64d], [lib])
;;
+ilp32-riscv/rv32/*)
+ LIBC_SLIBDIR_RTLDDIR([lib32/ilp32], [lib])
+ ;;
+ilp32d-riscv/rv32/*)
+ LIBC_SLIBDIR_RTLDDIR([lib32/ilp32d], [lib])
+ ;;
esac
ldd_rewrite_script=sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed
diff --git a/sysdeps/unix/sysv/linux/riscv/rv32/Implies b/sysdeps/unix/sysv/linux/riscv/rv32/Implies
new file mode 100644
index 0000000000..8b7deb33cd
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/riscv/rv32/Implies
@@ -0,0 +1,3 @@
+unix/sysv/linux/riscv
+unix/sysv/linux/generic/wordsize-32
+unix/sysv/linux/generic
diff --git a/sysdeps/unix/sysv/linux/riscv/shlib-versions b/sysdeps/unix/sysv/linux/riscv/shlib-versions
index 98c9b29cc4..919c8ec1fd 100644
--- a/sysdeps/unix/sysv/linux/riscv/shlib-versions
+++ b/sysdeps/unix/sysv/linux/riscv/shlib-versions
@@ -1,9 +1,15 @@
-DEFAULT GLIBC_2.27
-
%if RISCV_ABI_XLEN == 64 && RISCV_ABI_FLEN == 64
+DEFAULT GLIBC_2.27
ld=ld-linux-riscv64-lp64d.so.1
%elif RISCV_ABI_XLEN == 64 && RISCV_ABI_FLEN == 0
+DEFAULT GLIBC_2.27
ld=ld-linux-riscv64-lp64.so.1
+%elif RISCV_ABI_XLEN == 32 && RISCV_ABI_FLEN == 64
+DEFAULT GLIBC_2.32
+ld=ld-linux-riscv32-ilp32d.so.1
+%elif RISCV_ABI_XLEN == 32 && RISCV_ABI_FLEN == 0
+DEFAULT GLIBC_2.32
+ld=ld-linux-riscv32-ilp32.so.1
%else
%error cannot determine ABI
%endif
--
2.27.0
next prev parent reply other threads:[~2020-07-12 15:57 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-12 15:47 [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Alistair Francis
2020-07-12 15:47 ` [PATCH v3 01/19] RISC-V: Use 64-bit time_t and off_t for RV32 and RV64 Alistair Francis
2020-07-15 17:29 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 02/19] RISC-V: Cleanup some of the sysdep.h code Alistair Francis
2020-07-16 1:07 ` Maciej W. Rozycki
2020-08-10 15:16 ` Alistair Francis
2020-07-12 15:47 ` [PATCH v3 03/19] RISC-V: Use 64-bit-time syscall numbers with the 32-bit port Alistair Francis
2020-07-16 1:58 ` Maciej W. Rozycki
2020-08-10 15:15 ` Alistair Francis
2020-07-12 15:47 ` [PATCH v3 04/19] RISC-V: Add support for 32-bit vDSO calls Alistair Francis
2020-07-16 0:12 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 05/19] RISC-V: Support dynamic loader for the 32-bit Alistair Francis
2020-07-12 15:47 ` [PATCH v3 06/19] sysv/linux: riscv: Fix dl-cache.h indentation Alistair Francis
2020-07-16 6:31 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 07/19] RISC-V: Add path of library directories for the 32-bit Alistair Francis
2020-07-16 7:03 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 08/19] RISC-V: Add arch-syscall.h for RV32 Alistair Francis
2020-07-12 15:47 ` [PATCH v3 09/19] RISC-V: nptl: update default pthread-offsets.h Alistair Francis
2020-07-12 15:47 ` [PATCH v3 10/19] RISC-V: Support the 32-bit ABI implementation Alistair Francis
2020-07-16 8:23 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 11/19] RISC-V: Hard float support for 32-bit Alistair Francis
2020-07-16 8:27 ` Maciej W. Rozycki
2020-07-12 15:47 ` [PATCH v3 12/19] RISC-V: Add ABI lists Alistair Francis
2020-07-12 15:47 ` [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps Alistair Francis
2020-07-13 17:14 ` Maciej W. Rozycki
2020-07-13 17:32 ` Alistair Francis
2020-07-13 19:19 ` Maciej W. Rozycki
2020-07-13 19:38 ` Carlos O'Donell
2020-07-30 23:11 ` [PATCH] RISC-V: Update lp64d libm-test-ulps according to HiFive Unleashed Maciej W. Rozycki
2020-08-03 17:52 ` Carlos O'Donell
2020-08-04 12:01 ` Maciej W. Rozycki
2020-07-13 21:26 ` [PATCH v3 13/19] RISC-V: Add the RV32 libm-test-ulps Joseph Myers
2020-07-13 21:30 ` Carlos O'Donell
2020-07-13 21:59 ` Joseph Myers
2020-07-13 22:26 ` Andrew Waterman
2020-07-14 0:00 ` Maciej W. Rozycki
2020-07-14 17:24 ` Joseph Myers
2020-07-12 15:47 ` [PATCH v3 14/19] RISC-V: Fix llrint and llround missing exceptions on RV32 Alistair Francis
2020-07-14 22:13 ` Maciej W. Rozycki
2020-07-22 16:30 ` Alistair Francis
2020-07-12 15:48 ` Alistair Francis [this message]
2020-07-14 23:55 ` [PATCH v3 15/19] RISC-V: Build Infastructure for 32-bit Maciej W. Rozycki
2020-08-10 15:45 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 16/19] riscv32: Specify the arch_minimum_kernel as 5.4 Alistair Francis
2020-07-15 0:06 ` Maciej W. Rozycki
2020-07-16 1:34 ` Maciej W. Rozycki
2020-07-12 15:48 ` [PATCH v3 17/19] RISC-V: Add rv32 path to RTLDLIST in ldd Alistair Francis
2020-07-15 0:32 ` Maciej W. Rozycki
2020-08-10 20:04 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 18/19] Documentation for the RISC-V 32-bit port Alistair Francis
2020-07-13 17:17 ` Adhemerval Zanella
2020-07-14 13:28 ` Alistair Francis
2020-07-15 0:53 ` Maciej W. Rozycki
2020-07-22 16:33 ` Alistair Francis
2020-07-12 15:48 ` [PATCH v3 19/19] Add RISC-V 32-bit target to build-many-glibcs.py Alistair Francis
2020-07-15 1:16 ` Maciej W. Rozycki
2020-07-13 21:15 ` [PATCH v3 00/19] glibc port for 32-bit RISC-V (RV32) Joseph Myers
2020-07-14 13:18 ` Alistair Francis
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