From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [85.215.255.24]) by sourceware.org (Postfix) with ESMTPS id 231823858D33 for ; Mon, 30 Oct 2023 15:22:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 231823858D33 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=clisp.org Authentication-Results: sourceware.org; spf=none smtp.mailfrom=clisp.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 231823858D33 Authentication-Results: server2.sourceware.org; arc=pass smtp.remote-ip=85.215.255.24 ARC-Seal: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1698679373; cv=pass; b=OBBXU7qsBheJCfqjtDIgDaw+AMtGwVlG9Ysco/vUxmKGATXNUvKVmcNf9IG0rlQG1WHYsGue7nLL+09T91Ybp37pcfhkqptOuFOaTImI/CgGRQGVz1JrbQrV/BLMPIMV0v9E0AfgGHLNampXNCMCdyeVAIE337q/xvLutsbma9I= ARC-Message-Signature: i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1698679373; c=relaxed/simple; bh=fqGQByxvHqnndL1eVcufUHGtiVopRb/tVzeRVwpoGI4=; h=DKIM-Signature:DKIM-Signature:From:To:Subject:Date:Message-ID: MIME-Version; b=K1T5o5oQ+v3VfWV8RWz5J957gQ3AYkYOeFPXtZGhy7S3G6rOzBv/cAolBxSFkYt0GnLiX7SJucHqFHpIRWmOky8RtXokmDtH03CXNkGmMvc7roawT5iY99z609OPXZHuAluZkeEm8cJQ5aKpg5JjukdDcHF7PoZdslc7oZSnkrs= ARC-Authentication-Results: i=2; server2.sourceware.org ARC-Seal: i=1; a=rsa-sha256; t=1698679370; cv=none; d=strato.com; s=strato-dkim-0002; b=jiFg3K9DWqj+HLhMYNSp3dn7mOA0E3yl3EguzNX5PSEXtPh6pUPpPk2zEilA4kEb1t YU2unjNo0CWkgFhJwBmoMumvggNiMgVLEkDXXhazATOD9x6WohIhBbW8VIkg7WKVLFyg LaPd3lF74bLKkBjCFUI01ZeAkzjDXXMR40TmPHpgQc/1gty/QecYHvQm0z1ce5iln+/t +KDoCbYGD9+RXKRhGGsxDlQSVPEAZ3QJvqhaht8RSCJ6uLUsXbCpgO50ZCIdE/p57AwI 8gXI0LG1faQe1h/xzsP6Rujd+qlTv8n2um3erdIT2V1a/2OSydoerWnYE/nURDJ/atPt 5b0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; t=1698679370; s=strato-dkim-0002; d=strato.com; h=References:In-Reply-To:Message-ID:Date:Subject:To:From:Cc:Date:From: Subject:Sender; bh=0L9Pif0Tr2MY1bvFDwEB8euNIqk9vpKpSz6ntOmqfkc=; b=GKgq2I/+OKjMtWqb2k5eSSBN7u+BepJ2xX5SmXBbqwKsc395+giPqJCOXvDkdB55UC 7UPomrbXluMrVWw6oa5sMEySNfDnPy9TFaH878OQMwxUKsxhpvvfIJ5gE9PIY49Q7U9z E2BPic4vgIu/iwHo/2mJnA6WI2xpSXPHxT/NWfJ+lxwDrrUUjrf5rEskikv02ICPM/7E /xbn+dh6jK2aJLG8X3sd04kWa9payxqO9rdxV3Xt83nVumfrpxFd+dmdcXcmnQadbwNN VCT//Llh1uWe8oSxbGs2Bpk+12Jh1GPEp1EzLiG0KYzetl2yIX0WyFhf906TvzNLeAz5 L91g== ARC-Authentication-Results: i=1; strato.com; arc=none; dkim=none X-RZG-CLASS-ID: mo00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1698679370; s=strato-dkim-0002; d=clisp.org; h=References:In-Reply-To:Message-ID:Date:Subject:To:From:Cc:Date:From: Subject:Sender; bh=0L9Pif0Tr2MY1bvFDwEB8euNIqk9vpKpSz6ntOmqfkc=; b=dmA1uZ/nGMh5gL6HxLrokOzIcHihsiarUyYGgU8TQKSMJ44O+IGrbMekxuAMPKx+JN tF3sbB+2SzhczlT9575KxKR/gjyuUScT/0UPoUqA/Fs9es1kLSo21YpMnY3Zv4IklGyq AdeEYGI4OH54Qcz9Nqc0uc1VKZYQKRU/4LiZ9XTJ50eGdfIOttV5/C4YUPUQ645vxREJ kfl9gYvNDJ5T3W2inoKkM0TC6bFN05NFRoWVmVJpSfOV1O1PuOg8YB51icSA1ew5rMkn jgWYvMK5KJ2qvOuXepp0W/hbO5FEHjrek3vj9SdIPMTFpRtMV4YvWRSMMcinVEMPMmgi cvEA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; t=1698679370; s=strato-dkim-0003; d=clisp.org; h=References:In-Reply-To:Message-ID:Date:Subject:To:From:Cc:Date:From: Subject:Sender; bh=0L9Pif0Tr2MY1bvFDwEB8euNIqk9vpKpSz6ntOmqfkc=; b=6/+kmPzDk99M/XQy9R90t0EHhcu2mt4fnwW4XLN7EAbKLiK1YTdv51VUKTNgiLZ+zp mbhPF3uSrWOJ69HOHMCA== X-RZG-AUTH: ":Ln4Re0+Ic/6oZXR1YgKryK8brlshOcZlIWs+iCP5vnk6shH0WWb0LN8XZoH94zq68+3cfpPFjaCHgFzkC+zeDJgocaurNG/i+w==" Received: from nimes.localnet by smtp.strato.de (RZmta 49.9.1 AUTH) with ESMTPSA id ecf079z9UFMoN8P (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Mon, 30 Oct 2023 16:22:50 +0100 (CET) From: Bruno Haible To: libc-alpha@sourceware.org, Adhemerval Zanella Subject: Re: [PATCH v2 3/3] x86: Do not raises floating-point exception traps on fesetexceptflag (BZ 30990) Date: Mon, 30 Oct 2023 16:22:49 +0100 Message-ID: <4141177.K71DO8KEF6@nimes> In-Reply-To: <20231024113716.3911015-4-adhemerval.zanella@linaro.org> References: <20231024113716.3911015-1-adhemerval.zanella@linaro.org> <20231024113716.3911015-4-adhemerval.zanella@linaro.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="nextPart4349723.IFkqi6BYcA" Content-Transfer-Encoding: 7Bit X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multi-part message in MIME format. --nextPart4349723.IFkqi6BYcA Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Hi Adhemerval, Like in the PATCH v2 2/3, in the error case, the new code mistakenly masks all floating-point exceptions (i.e. as if someone had called fedisableexcept (FE_ALL_EXCEPT)). This is because the FNSTENV instruction is documented as "Saves the current FPU operating environment at the memory location specified with the destination operand, and then masks all floating-point exceptions." The mistake came from my initial proposed fix. Sorry about that. Here's a proposed fix, on top of your patch. I've verified that the sequence of instructions __asm__ ("fnstenv %0" : "=m" (*&temp)); __asm__ volatile ("fldcw %0" : : "m" (*&temp.__control_word)); does restore the exceptions trapping bits. Bruno --nextPart4349723.IFkqi6BYcA Content-Disposition: attachment; filename="BZ30990-fnstenv-fix.diff" Content-Transfer-Encoding: quoted-printable Content-Type: text/x-patch; charset="UTF-8"; name="BZ30990-fnstenv-fix.diff" diff --git a/sysdeps/i386/fpu/fsetexcptflg.c b/sysdeps/i386/fpu/fsetexcptfl= g.c index ccbcf35e8e..8bff9026a1 100644 =2D-- a/sysdeps/i386/fpu/fsetexcptflg.c +++ b/sysdeps/i386/fpu/fsetexcptflg.c @@ -36,6 +36,8 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) /* Get the current x87 FPU environment. We have to do this since we cannot separately set the status word. */ __asm__ ("fnstenv %0" : "=3Dm" (*&temp)); + /* Note: fnstenv masks all floating-point exceptions until the fldenv + or fldcw below. */ =20 if (CPU_FEATURE_USABLE (SSE)) { @@ -62,10 +64,13 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) temp.__status_word ^=3D (temp.__status_word ^ *flagp) & excepts; =20 if ((~temp.__control_word) & temp.__status_word & excepts) =2D /* Setting the exception flags may trigger a trap (at the next =2D floating-point instruction, but that does not matter). =2D ISO C 23 =C2=A7 7.6.4.5 does not allow it. */ =2D return -1; + { + /* Setting the exception flags may trigger a trap (at the next + floating-point instruction, but that does not matter). + ISO C 23 =C2=A7 7.6.4.5 does not allow it. */ + __asm__ volatile ("fldcw %0" : : "m" (*&temp.__control_word)); + return -1; + } =20 /* Store the new status word (along with the rest of the environment= ). */ __asm__ ("fldenv %0" : : "m" (*&temp)); --nextPart4349723.IFkqi6BYcA--