Re: [PATCH] powerpc: Fix __fesetround_inline_nocheck on POWER9+ (BZ 31682)

[Paul E Murphy <murphyp@linux.ibm.com>]

On 4/30/24 1:34 PM, Adhemerval Zanella Netto wrote:
> 
> 
> On 30/04/24 15:13, Paul E Murphy wrote:
>>
>>
>> On 4/30/24 7:40 AM, Adhemerval Zanella wrote:
>>> The e68b1151f7460d5fa88c3a567c13f66052da79a7 commit changed the
>>> __fesetround_inline_nocheck implementation to use mffscrni
>>> (through __fe_mffscrn) instead of mtfsfi.  For generic powerpc
>>> ceil/floor/trunc, the function is supposed to not change the
>>> Floating-Point Inexact Exception Enable bit, however mffscrni
>>> clear bits 56:63 (VE, OE, UE, ZE, XE, NI, RN), different than mtfsfi.
>>
>> I don't think that explanation is correct. mffscrni should not alter the exception enable bits. It copies them into FRT, but does not clear them.
> 
> Yeah, I forgot to add that mffscrni in this context clears because
> there is no easy way to mask out the current bits 56:63 since only
> the rounding bit is provided.  So maybe:
> 
>    The e68b1151f7460d5fa88c3a567c13f66052da79a7 commit changed the
>    __fesetround_inline_nocheck implementation to use mffscrni
>    (through __fe_mffscrn) instead of mtfsfi.  For generic powerpc
>    ceil/floor/trunc, the function is supposed to not change the
>    Floating-Point Inexact Exception Enable bit, however mffscrni
>    usage always clear the the bits 56:63 (VE, OE, UE, ZE, XE, NI, RN),
>    since only the rounding mode is provided.

I think the comment has mtfsfi and mffscrni swapped.  The usage of 
mtfsfi clears bits 60 (XE) and 61 (NI) of the fpscr.  mffscrni does not 
alter any fpscr bits besides RN.

Should __fesetround_inline_nocheck be removed in favor of using 
__fesetround_inline?  The description of __fesetround_inline_nocheck is 
confusing. It fails to mention that XE and NI are cleared, as implied by 
the usage of mtfsfi.