From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by sourceware.org (Postfix) with ESMTPS id 7F54E3858D1E for ; Thu, 22 Dec 2022 23:58:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7F54E3858D1E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pj1-x102e.google.com with SMTP id k88-20020a17090a4ce100b00219d0b857bcso3461917pjh.1 for ; Thu, 22 Dec 2022 15:58:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=wuQb18hsH3PVKKhlNX3iIN37M1+/+r0ie7whgaMIAuI=; b=JWTRj/CS6QleDMkVnOcUuDhwl4FBxyuEcl1DJkuBzancbxmUVcaJCRv5n96N7pB+AS V5sZLbwaURsOe0GW0gnWnMgTKAFu70S8L2Dwy5tNUeI3gjz4ZbHTJbbBgG7jSXE3ew0/ cYjcUDnZKVeD5sWWgjtwO/6WCXfnhs5DZrC5sTSf6C07bakGHzjMGWQMRQWAM6KbleBH PW7GnMhx8uJESRYt1W3pcNAXlK9NQD0MIGQeWbFJ6mpU8Px18T07tZWBxqLOblatcCQT LtlExVx+eJvlYWOUaDejAHT3sENc9kbxMJcthmAjNjJ9YVVZd3a6x6oP46+nxoktP2mW dvRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=wuQb18hsH3PVKKhlNX3iIN37M1+/+r0ie7whgaMIAuI=; b=OOynYbrMi0YrB0Y/p6v2gvU5BATkz/PTNJAiKeF2DXZpHleIaPk7rwqRszEpo5N4Ef 70Sugntzo8YBv6xUZ/UvWkj/DZMEhfxdFlYCOsu5H8JEHZk1sGVrjT+d04RUbm0Bv7vV TO2T67TpHg/C39o2Dwmtd886MfFhqzOHLt66hI5bAUMNFvw7S9jTeYwBvbXuOtZ7vdJq UpxV6fIlyrNJ0/AyvcU7IHrQLpCDwPjIb0Jmr+Zzhiy16qEx1ORIcYXMrDhx4Hs8w3jq 8dEZQHY5V0DVjv0tkm1apgIx3NBomqqOCBeZI7SSjJEqjXTTnPbEE4VMZ87l1FWywROy UUPg== X-Gm-Message-State: AFqh2kp8iVtKLwGbZWsC0U8d8O8V+7R7id4Le0diSmFGgLW7XrxtN3ru esNQG5Hnma8LHcZFO5zCUvO+DA== X-Google-Smtp-Source: AMrXdXuSxui2eZcxC12b3uNSSsVrt7hM2p8XGfKziz4RHlFkfHTJw7jHoXHNI/kfX52FFs4bn9lpMA== X-Received: by 2002:a05:6a20:698b:b0:a5:35f1:95d1 with SMTP id t11-20020a056a20698b00b000a535f195d1mr11822531pzk.35.1671753525608; Thu, 22 Dec 2022 15:58:45 -0800 (PST) Received: from [192.168.50.116] (c-24-4-73-83.hsd1.ca.comcast.net. [24.4.73.83]) by smtp.gmail.com with ESMTPSA id j186-20020a6255c3000000b00576259507c0sm1242500pfb.100.2022.12.22.15.58.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Dec 2022 15:58:45 -0800 (PST) Message-ID: <56d98923-7b74-f8c9-b65d-a4942071c92d@rivosinc.com> Date: Thu, 22 Dec 2022 15:58:42 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: Adding V-ext regs to signal context w/o expanding kernel struct sigcontext to avoid glibc ABI break Content-Language: en-US To: Conor Dooley , Andy Chiu Cc: Richard Henderson , Vincent Chen , Florian Weimer , Rich Felker , Andrew Waterman , Palmer Dabbelt , Kito Cheng , =?UTF-8?Q?Christoph_M=c3=bcllner?= , davidlt@rivosinc.com, Arnd Bergmann , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Philipp Tomsich , Szabolcs Nagy , Greentime Hu , Aaron Durbin , Andrew de los Reyes , linux-riscv , GNU C Library References: <87sfy5ndid.fsf@oldenburg.str.redhat.com> <73c0124c-4794-6e40-460c-b26df407f322@rivosinc.com> <50c598a6-e3b3-3062-abe7-23a406067533@rivosinc.com> <7430f494-9b43-5e03-c1e9-6b83e2611a11@rivosinc.com> From: Vineet Gupta In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,NICE_REPLY_A,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 12/22/22 15:47, Conor Dooley wrote: > On Fri, Dec 23, 2022 at 02:33:26AM +0800, Andy Chiu wrote: > >> I wrote a PoC patch for this and it has been pushed into the following git tree: >> https://github.com/sifive/riscv-linux/tree/dev/andyc/for-next-v13 >> I tested it on a rv32 QEMU virt machine and the user space can get/set >> Vector registers normally. I haven't tested it on rv64 yet but it >> should be no difference. The patch is not the final version and maybe >> I missed some basic ideas. >> But if everyone agrees with this approach >> then I would like to start formalizing and submit the series. > Between yourself and the Rivos folk, you should probably sort out who is > doing what with the series at the very least, so that you're not both > working on "competing" v13s... No we are not competing ;-) I'm mostly facilitating since this got stuck in a stalemate and original contributors had gone radio silent for a while. -Vineet