From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTP id 4CA98399E04E for ; Fri, 4 Jun 2021 19:31:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4CA98399E04E Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-62-tninmsqUNIOnX_-sInyb9A-1; Fri, 04 Jun 2021 15:31:55 -0400 X-MC-Unique: tninmsqUNIOnX_-sInyb9A-1 Received: by mail-qv1-f72.google.com with SMTP id b24-20020a0cb3d80000b02901e78b82d74aso7379843qvf.20 for ; Fri, 04 Jun 2021 12:31:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:subject:to:cc:references:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=ETHH/Yowt019ei130M5T8x50q0c5Zh9zLBHmk5zZ9TI=; b=ZaI0W0XXXRcay1/d4189ZIhpE8VQlVvInN+yjDvV5aBihcjkIQZBqzdKPRaBnetujm pZUXsB6twTc11pLwHEhSDIPQE7Vq2H+orpR4neHC3Cz9xDQ8wAoGpcui2kbcB2a4c2Ll xHss9E3od9AZX9yFr+ataJr+N/mD1gFkahwFGFFlNdzriKtJ/aZZfTMKO8tLEYEu1pbl 8DlWai2BKb0nsy/5gf2Y4B7NlTE3edtH04eYKFsBI6XtVqXKf+xH4inSBB4V7irafNC1 zthFXqA7I06NwUtj1WXGBXAasbZGT+6/bSH7Ab/T6XHDo0vWuYBanXdtbucS0KMlwYf1 d7Hw== X-Gm-Message-State: AOAM532JqZYcw1QQGm+3NrV6ucke5EuuxrtThURvfxClb+UBYC68ubk9 TyTjNvjw4Ha3mwZYu2qX/ajoSR966BMXgRdvyZJ8rN+Tyyc+LXjmlMErgaygy05Ymq/Zn3HXHil 1mFe2x7kNehIZk0LnYYRP X-Received: by 2002:ac8:690f:: with SMTP id e15mr6237100qtr.143.1622835115088; Fri, 04 Jun 2021 12:31:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw6boKPExATjyuNnDFTDaD7CbM+WvXHNEDhjcn65uAqg1O88Z1QNYWYPvTrqLpXnH2AwoQSEA== X-Received: by 2002:ac8:690f:: with SMTP id e15mr6237088qtr.143.1622835114922; Fri, 04 Jun 2021 12:31:54 -0700 (PDT) Received: from [192.168.1.16] (198-84-214-74.cpe.teksavvy.com. [198.84.214.74]) by smtp.gmail.com with ESMTPSA id o5sm4448786qkl.25.2021.06.04.12.31.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Jun 2021 12:31:54 -0700 (PDT) From: Carlos O'Donell Subject: Re: [PATCH v2 12/25] y2038: linux: Add __USE_TIME_BITS64 support for struct timex To: Adhemerval Zanella , libc-alpha@sourceware.org References: <20210518205613.1487824-1-adhemerval.zanella@linaro.org> <20210518205613.1487824-13-adhemerval.zanella@linaro.org> Organization: Red Hat Message-ID: <59aa9322-e3e5-3f5e-aac6-216dd904692c@redhat.com> Date: Fri, 4 Jun 2021 15:31:53 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210518205613.1487824-13-adhemerval.zanella@linaro.org> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, NICE_REPLY_A, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Jun 2021 19:31:58 -0000 On 5/18/21 4:56 PM, Adhemerval Zanella wrote: > The __USE_TIME_BITS64 is not defined internally yet. LGTM. No regressions on x86_64, i686, ppc64le, aarch64, s390x. Reviewed-by: Carlos O'Donell Tested-by: Carlos O'Donell > --- > sysdeps/unix/sysv/linux/bits/timex.h | 31 ++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/sysdeps/unix/sysv/linux/bits/timex.h b/sysdeps/unix/sysv/linux/bits/timex.h > index 9b2e30f3e0..ee37694e8f 100644 > --- a/sysdeps/unix/sysv/linux/bits/timex.h > +++ b/sysdeps/unix/sysv/linux/bits/timex.h > @@ -25,6 +25,36 @@ > > struct timex > { Checking against Linux kernel... > +# ifdef __USE_TIME_BITS64 > + unsigned int modes; /* mode selector */ OK. > + int :32; /* pad */ > + long long offset; /* time offset (usec) */ > + long long freq; /* frequency offset (scaled ppm) */ > + long long maxerror; /* maximum error (usec) */ > + long long esterror; /* estimated error (usec) */ OK. > + int status; /* clock command/status */ > + int :32; /* pad */ OK. > + long long constant; /* pll time constant */ > + long long precision; /* clock precision (usec) (read only) */ > + long long tolerance; /* clock frequency tolerance (ppm) (ro) */ OK. > + struct timeval time; /* (read only, except for ADJ_SETOFFSET) */ OK. > + long long tick; /* (modified) usecs between clock ticks */ > + long long ppsfreq; /* pps frequency (scaled ppm) (ro) */ > + long long jitter; /* pps jitter (us) (ro) */ > + int shift; /* interval duration (s) (shift) (ro) */ OK. > + int :32; /* pad */ OK. > + long long stabil; /* pps stability (scaled ppm) (ro) */ > + long long jitcnt; /* jitter limit exceeded (ro) */ > + long long calcnt; /* calibration intervals (ro) */ > + long long errcnt; /* calibration errors (ro) */ > + long long stbcnt; /* stability limit exceeded (ro) */ OK. > + > + int tai; /* TAI offset (ro) */ > + > + int :32; int :32; int :32; int :32; > + int :32; int :32; int :32; int :32; > + int :32; int :32; int :32; OK. 12x > +# else > unsigned int modes; /* mode selector */ > __syscall_slong_t offset; /* time offset (usec) */ > __syscall_slong_t freq; /* frequency offset (scaled ppm) */ > @@ -51,6 +81,7 @@ struct timex > int :32; int :32; int :32; int :32; > int :32; int :32; int :32; int :32; > int :32; int :32; int :32; > +# endif > }; > > /* Mode codes (timex.mode) */ > -- Cheers, Carlos.