From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2e.google.com (mail-oa1-x2e.google.com [IPv6:2001:4860:4864:20::2e]) by sourceware.org (Postfix) with ESMTPS id CABBC3858D37 for ; Wed, 20 Jul 2022 14:32:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CABBC3858D37 Received: by mail-oa1-x2e.google.com with SMTP id 586e51a60fabf-10cf9f5b500so35119012fac.2 for ; Wed, 20 Jul 2022 07:32:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:references:from:organization:in-reply-to :content-transfer-encoding; bh=q4d74CGCNZaYF9PZtIAOekxQ+0pCEV/OR0VyPt3d6Jw=; b=1wWbGHeuA/PHaC1v0lp1dfDGOsqsOmBzA29TsElopVrPKVVNC3OY8KbXm/66ohUO0T kDOqk+oSk+MgRy4fsPknr/mRtS0EXuUb1VfohzzUSDIhvvHEHXOb1z/4wb1GgTzAOlj7 XA/KMZKzmDKbYfshODWKV/gAqgIKex+HG8xF0hcY5nZxc+22ZXBdXYwPxmCzcDfVCZUa 02A5gfLwbNbSf/uZwyupkAyKpxornk8s9V+Mz5QEHpv5oLZqoLrHcKKvfRobr9sFnwEE 6Bm8XlCUPVgXxMCtCi5h7T/7c6ud5gdCLoR+PSLo1FJM6Xe8eM0p+4SqoG25huXpdc1o L50A== X-Gm-Message-State: AJIora9lrpW0Y5M/qDKUslSNauJ6ToUTPsVgl86WVkii0O4MreHSJTri SazfVx9qaMp3P9mXD6XvMFp46g== X-Google-Smtp-Source: AGRyM1taNsCcpdOlkbYfUTDK43I2ESGvUdJfqTvwric3aMAW86OAseMEmOG8/+W6Tf/daCXyQnVSZA== X-Received: by 2002:a05:6870:179c:b0:10d:8398:5d67 with SMTP id r28-20020a056870179c00b0010d83985d67mr1837415oae.242.1658327577146; Wed, 20 Jul 2022 07:32:57 -0700 (PDT) Received: from ?IPV6:2804:431:c7cb:8ded:dd7a:8a21:1a2b:76c5? ([2804:431:c7cb:8ded:dd7a:8a21:1a2b:76c5]) by smtp.gmail.com with ESMTPSA id 25-20020aca2819000000b00339bf4473bcsm6459007oix.56.2022.07.20.07.32.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Jul 2022 07:32:56 -0700 (PDT) Message-ID: <5c9e8112-23d4-4f13-17ce-25a16c601779@linaro.org> Date: Wed, 20 Jul 2022 11:32:54 -0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.0.2 Subject: Re: [PATCH v7 06/13] LoongArch: Atomic and Locking Routines Content-Language: en-US To: caiyinyu , libc-alpha@sourceware.org, joseph_myers@mentor.com, carlos@redhat.com, i.swmail@xen0n.name References: <20220719012056.1461897-1-caiyinyu@loongson.cn> <20220719012056.1461897-7-caiyinyu@loongson.cn> From: Adhemerval Zanella Netto Organization: Linaro In-Reply-To: <20220719012056.1461897-7-caiyinyu@loongson.cn> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, NICE_REPLY_A, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Jul 2022 14:32:59 -0000 LGTM. We really need to remove this old atomic wrappers / implementations... Reviewed-by: Adhemerval Zanella On 18/07/22 22:20, caiyinyu wrote: > --- > .../sysv/linux/loongarch/atomic-machine.h | 147 ++++++++++++++++++ > 1 file changed, 147 insertions(+) > create mode 100644 sysdeps/unix/sysv/linux/loongarch/atomic-machine.h > > diff --git a/sysdeps/unix/sysv/linux/loongarch/atomic-machine.h b/sysdeps/unix/sysv/linux/loongarch/atomic-machine.h > new file mode 100644 > index 0000000000..d1b8f1c11b > --- /dev/null > +++ b/sysdeps/unix/sysv/linux/loongarch/atomic-machine.h > @@ -0,0 +1,147 @@ > +/* Atomic operations. > + Copyright (C) 2022 Free Software Foundation, Inc. > + This file is part of the GNU C Library. > + > + The GNU C Library is free software; you can redistribute it and/or > + modify it under the terms of the GNU Lesser General Public > + License as published by the Free Software Foundation; either > + version 2.1 of the License, or (at your option) any later version. > + > + The GNU C Library is distributed in the hope that it will be useful, > + but WITHOUT ANY WARRANTY; without even the implied warranty of > + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > + Lesser General Public License for more details. > + > + You should have received a copy of the GNU Lesser General Public > + License along with the GNU C Library. If not, see > + . */ > + > +#ifndef _LINUX_LOONGARCH_BITS_ATOMIC_H > +#define _LINUX_LOONGARCH_BITS_ATOMIC_H 1 > + > +#define atomic_full_barrier() __sync_synchronize () > + > +#define __HAVE_64B_ATOMICS (__loongarch_grlen >= 64) > +#define USE_ATOMIC_COMPILER_BUILTINS 1 > +#define ATOMIC_EXCHANGE_USES_CAS 0 > + > +/* Compare and exchange. > + For all "bool" routines, we return FALSE if exchange succesful. */ > + > +#define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + }) > + > +#define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + }) > + > +#define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + }) > + > +#define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + }) > + > +#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + __oldval; \ > + }) > + > +#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + __oldval; \ > + }) > + > +#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + __oldval; \ > + }) > + > +#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ > + ({ \ > + typeof (*mem) __oldval = (oldval); \ > + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, model, \ > + __ATOMIC_RELAXED); \ > + __oldval; \ > + }) > + > +/* Atomic compare and exchange. */ > + > +#define atomic_compare_and_exchange_bool_acq(mem, new, old) \ > + __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, mem, new, old, \ > + __ATOMIC_ACQUIRE) > + > +#define atomic_compare_and_exchange_val_acq(mem, new, old) \ > + __atomic_val_bysize (__arch_compare_and_exchange_val, int, mem, new, old, \ > + __ATOMIC_ACQUIRE) > + > +#define atomic_compare_and_exchange_val_rel(mem, new, old) \ > + __atomic_val_bysize (__arch_compare_and_exchange_val, int, mem, new, old, \ > + __ATOMIC_RELEASE) > + > +/* Atomic exchange (without compare). */ > + > +#define __arch_exchange_8_int(mem, newval, model) \ > + __atomic_exchange_n (mem, newval, model) > + > +#define __arch_exchange_16_int(mem, newval, model) \ > + __atomic_exchange_n (mem, newval, model) > + > +#define __arch_exchange_32_int(mem, newval, model) \ > + __atomic_exchange_n (mem, newval, model) > + > +#define __arch_exchange_64_int(mem, newval, model) \ > + __atomic_exchange_n (mem, newval, model) > + > +#define atomic_exchange_acq(mem, value) \ > + __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_ACQUIRE) > + > +#define atomic_exchange_rel(mem, value) \ > + __atomic_val_bysize (__arch_exchange, int, mem, value, __ATOMIC_RELEASE) > + > +/* Atomically add value and return the previous (unincremented) value. */ > + > +#define __arch_exchange_and_add_8_int(mem, value, model) \ > + __atomic_fetch_add (mem, value, model) > + > +#define __arch_exchange_and_add_16_int(mem, value, model) \ > + __atomic_fetch_add (mem, value, model) > + > +#define __arch_exchange_and_add_32_int(mem, value, model) \ > + __atomic_fetch_add (mem, value, model) > + > +#define __arch_exchange_and_add_64_int(mem, value, model) \ > + __atomic_fetch_add (mem, value, model) > + > +#define atomic_exchange_and_add_acq(mem, value) \ > + __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \ > + __ATOMIC_ACQUIRE) > + > +#define atomic_exchange_and_add_rel(mem, value) \ > + __atomic_val_bysize (__arch_exchange_and_add, int, mem, value, \ > + __ATOMIC_RELEASE) > + > +#endif /* bits/atomic.h */