From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by sourceware.org (Postfix) with ESMTPS id B0BC33858D37 for ; Thu, 1 Sep 2022 13:01:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B0BC33858D37 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-11f34610d4aso20515245fac.9 for ; Thu, 01 Sep 2022 06:01:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:organization:from:references :cc:to:content-language:subject:user-agent:mime-version:date :message-id:from:to:cc:subject:date; bh=GKWES5vZkmn3Jj6WtjDNC7GFkOlU8j+kD7USoHeeuFg=; b=sMt2ox5Zg2PFE7StMgOjoGw3YHdJYTH6auEWW+nrMIzIDxj1lJa0kJM2JtkCTytn1b G8spmQyZILk50bRanKbkw5jJS7lxkytK8LAtjiVmVngn9FiPmJsggDvhBieID+0wnUHQ lKangHazxen8Ylc0BJ4jB9HTChT/fO0JV7wnTizfrFJMqvCeixxTON5ckT2Wkqijsmy9 9eqQ0wzgpRw/PmI672JHUc2nDxN74CYQoHqX89UuEy4gGn5nlJqGch4EQ/MIOaIFeIGh Tv1Up44tq3OtKKfu7IVO8VlHz4hGQ789QeB4Oaf8q5qcpx37WAkCsrCg3CElGdBP8sE6 iUQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:organization:from:references :cc:to:content-language:subject:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc:subject:date; bh=GKWES5vZkmn3Jj6WtjDNC7GFkOlU8j+kD7USoHeeuFg=; b=vwS7YQloOHIB3XZu6VmHHX6YazVRmOreLQao0anXgvg0kC0Sf8tboot6pCzP8WeMts Ygd7MfC+qpNdTQz3GtZ7Zu+5x+1zQAl6y2NThqIA0gnPovkipGv/yUHPUUWcM4fjyVil 9gKQtU7Qyc2l2IQ2UJZx989s/fmK9DOrPDeovhKL1QS15ydY60jvgqpQavWGNcFdhgyX vEHngdSg8memWab5IbA8EfF50SPBmCVCW9BJMggFYDXFcoxAoQTOjrQ2RONOkURh09de tWZB1xZLX2oT/t3hHhTfVf2rdWDJhvQyoMLUT8kxHpO2D+ZZV4EyiA5b6ccH4Pqaodzx yH8w== X-Gm-Message-State: ACgBeo3r1EqAu2M7KcqoOZ0DdmNrFVaH5xYO5EiMeEeqQokk6vsM/kwU KHc/NmzXHxaZLEag/vvLwYt66w== X-Google-Smtp-Source: AA6agR4i4YPV24Cs/w6OaNgW8hKWtecVjQQnVOWgLJ6y+HSCFW+6ALx5M1gu2APYfNBn0Ursj0JfTQ== X-Received: by 2002:a05:6870:831f:b0:11c:dfe3:ef6d with SMTP id p31-20020a056870831f00b0011cdfe3ef6dmr3839785oae.107.1662037295555; Thu, 01 Sep 2022 06:01:35 -0700 (PDT) Received: from [192.168.15.31] ([187.34.212.254]) by smtp.gmail.com with ESMTPSA id o63-20020acad742000000b00344eb5a9416sm8382267oig.55.2022.09.01.06.01.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Sep 2022 06:01:34 -0700 (PDT) Message-ID: <612f2a05-2e13-007c-0168-7d6eb9559554@linaro.org> Date: Thu, 1 Sep 2022 10:01:32 -0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH] math: x86: Remove extra '%' on FP_INIT_ROUNDMODE inline asm Content-Language: en-US To: "H.J. Lu" , joseph_myers@mentor.com Cc: libc-alpha@sourceware.org References: <20220831181443.3875972-1-adhemerval.zanella@linaro.org> From: Adhemerval Zanella Netto Organization: Linaro In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,NICE_REPLY_A,RCVD_IN_BARRACUDACENTRAL,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 31/08/22 16:33, H.J. Lu wrote: > On Wed, Aug 31, 2022 at 11:16 AM Adhemerval Zanella via Libc-alpha > wrote: >> >> Checked on x86_64-linux-gnu. >> --- >> sysdeps/x86/fpu/sfp-machine.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/sysdeps/x86/fpu/sfp-machine.h b/sysdeps/x86/fpu/sfp-machine.h >> index 5892f4f5fe..1cacdb4ebd 100644 >> --- a/sysdeps/x86/fpu/sfp-machine.h >> +++ b/sysdeps/x86/fpu/sfp-machine.h >> @@ -41,7 +41,7 @@ typedef unsigned int UTItype __attribute__ ((mode (TI))); >> >> # define FP_INIT_ROUNDMODE \ >> do { \ >> - __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (_fcw)); \ >> + __asm__ __volatile__ ("vstmxcsr\t%0" : "=m" (_fcw)); \ >> } while (0) >> #else >> # define _FP_W_TYPE_SIZE 32 >> -- >> 2.34.1 >> > > The intention was to generate stmxcsr with SSE and vstmxcsr with > AVX. I think we should define a special prefix, like AVX_INSN_PREFIX, > which is 'v' if __AVX__ is defined and empty if __AVX__ isn't defined. > Right, I was not aware of it. Is is documented on gcc inline assembly manual somewhere (I could not find it)? In any case I will follow your suggestion.