From: Adhemerval Zanella <adhemerval.zanella@linaro.org>
To: Stafford Horne <shorne@gmail.com>,
GLIBC patches <libc-alpha@sourceware.org>
Cc: Openrisc <openrisc@lists.librecores.org>
Subject: Re: [PATCH v4 06/13] or1k: Atomics and Locking primitives
Date: Mon, 3 Jan 2022 15:20:15 -0300 [thread overview]
Message-ID: <6b470dfe-f1f5-68b5-e8da-54a494d67d5e@linaro.org> (raw)
In-Reply-To: <20211229044251.2203653-7-shorne@gmail.com>
LGTM with the fix below.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
On 29/12/2021 01:42, Stafford Horne via Libc-alpha wrote:
> ---
> sysdeps/or1k/atomic-machine.h | 79 +++++++++++++++++++++++++++++++++++
> 1 file changed, 79 insertions(+)
> create mode 100644 sysdeps/or1k/atomic-machine.h
>
> diff --git a/sysdeps/or1k/atomic-machine.h b/sysdeps/or1k/atomic-machine.h
> new file mode 100644
> index 0000000000..1e306ae4ef
> --- /dev/null
> +++ b/sysdeps/or1k/atomic-machine.h
> @@ -0,0 +1,79 @@
> +/* Atomic operations. OpenRISC version.
> + Copyright (C) 2021 Free Software Foundation, Inc.
> + This file is part of the GNU C Library.
> +
> + The GNU C Library is free software; you can redistribute it and/or
> + modify it under the terms of the GNU Lesser General Public
> + License as published by the Free Software Foundation; either
> + version 2.1 of the License, or (at your option) any later version.
> +
> + The GNU C Library is distributed in the hope that it will be useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + Lesser General Public License for more details.
> +
> + You should have received a copy of the GNU Lesser General Public
> + License along with the GNU C Library. If not, see
> + <https://www.gnu.org/licenses/>. */
> +
> +#ifndef __OR1K_ATOMIC_H_
> +#define __OR1K_ATOMIC_H_
> +
> +#include <stdint.h>
> +
> +typedef int32_t atomic32_t;
> +typedef uint32_t uatomic32_t;
> +
> +typedef intptr_t atomicptr_t;
> +typedef uintptr_t uatomicptr_t;
> +typedef intmax_t atomic_max_t;
> +typedef uintmax_t uatomic_max_t;
There are not required any longer.
> +
> +#define __HAVE_64B_ATOMICS 0
> +#define USE_ATOMIC_COMPILER_BUILTINS 1
> +#define ATOMIC_EXCHANGE_USES_CAS 1
> +
> +#define __arch_compare_and_exchange_bool_8_int(mem, newval, oldval, model) \
> + (abort (), 0)
> +
> +#define __arch_compare_and_exchange_bool_16_int(mem, newval, oldval, model) \
> + (abort (), 0)
> +
> +#define __arch_compare_and_exchange_bool_32_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + !__atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
> + model, __ATOMIC_RELAXED); \
> + })
> +
> +#define __arch_compare_and_exchange_bool_64_int(mem, newval, oldval, model) \
> + (abort (), 0)
> +
> +#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
> + (abort (), (__typeof (*mem)) 0)
> +
> +#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
> + (abort (), (__typeof (*mem)) 0)
> +
> +#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
> + ({ \
> + typeof (*mem) __oldval = (oldval); \
> + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
> + model, __ATOMIC_RELAXED); \
> + __oldval; \
> + })
> +
> +#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
> + (abort (), (__typeof (*mem)) 0)
> +
> +#define atomic_compare_and_exchange_bool_acq(mem, new, old) \
> + __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \
> + mem, new, old, __ATOMIC_ACQUIRE)
> +
> +#define atomic_compare_and_exchange_val_acq(mem, new, old) \
> + __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
> + mem, new, old, __ATOMIC_ACQUIRE)
> +
> +#define atomic_full_barrier() ({ asm volatile ("l.msync" ::: "memory"); })
> +
> +#endif /* atomic-machine.h */
next prev parent reply other threads:[~2022-01-03 18:20 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-29 4:42 [PATCH v4 00/13] Glibc OpenRISC port Stafford Horne
2021-12-29 4:42 ` [PATCH v4 01/13] elf: Add reloc for OpenRISC Stafford Horne
2021-12-29 4:42 ` [PATCH v4 02/13] linux/syscalls: Add or1k_atomic syscall " Stafford Horne
2021-12-29 4:42 ` [PATCH v4 03/13] or1k: ABI Implementation Stafford Horne
2021-12-29 4:46 ` Stafford Horne
2022-01-03 18:10 ` Adhemerval Zanella
2022-01-04 0:29 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 04/13] or1k: startup and dynamic linking code Stafford Horne
2022-01-03 18:17 ` Adhemerval Zanella
2022-01-04 1:28 ` Stafford Horne
2022-01-04 3:08 ` Stafford Horne
2022-01-04 12:05 ` Adhemerval Zanella
2021-12-29 4:42 ` [PATCH v4 05/13] or1k: Thread Local Storage support Stafford Horne
2022-01-03 18:19 ` Adhemerval Zanella
2021-12-29 4:42 ` [PATCH v4 06/13] or1k: Atomics and Locking primitives Stafford Horne
2022-01-03 18:20 ` Adhemerval Zanella [this message]
2022-01-04 1:33 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 07/13] or1k: math soft float support Stafford Horne
2022-01-03 18:21 ` Adhemerval Zanella
2021-12-29 4:42 ` [PATCH v4 08/13] or1k: Linux Syscall Interface Stafford Horne
2022-01-03 18:21 ` Adhemerval Zanella
2022-01-04 1:36 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 09/13] or1k: Linux ABI Stafford Horne
2022-01-03 18:23 ` Adhemerval Zanella
2022-01-04 1:38 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 10/13] or1k: ABI lists Stafford Horne
2021-12-31 17:45 ` Joseph Myers
2022-01-01 4:54 ` Stafford Horne
2022-01-02 0:30 ` Stafford Horne
2022-01-03 18:24 ` Adhemerval Zanella
2022-01-04 1:40 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 11/13] or1k: Build Infrastructure Stafford Horne
2022-01-03 18:25 ` Adhemerval Zanella
2022-01-04 1:42 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 12/13] build-many-glibcs.py: add OpenRISC support Stafford Horne
2022-01-03 18:26 ` Adhemerval Zanella
2022-01-04 1:43 ` Stafford Horne
2021-12-29 4:42 ` [PATCH v4 13/13] Documentation for OpenRISC port Stafford Horne
2022-01-03 18:31 ` Adhemerval Zanella
2022-01-03 18:35 ` [PATCH v4 00/13] Glibc " Adhemerval Zanella
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