From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by sourceware.org (Postfix) with ESMTPS id 71198386EC26 for ; Fri, 21 May 2021 20:08:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 71198386EC26 Received: by mail.kernel.org (Postfix) with ESMTPSA id 891A961164; Fri, 21 May 2021 20:08:16 +0000 (UTC) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailauth.nyi.internal (Postfix) with ESMTP id 9660027C0054; Fri, 21 May 2021 16:08:15 -0400 (EDT) Received: from imap21 ([10.202.2.71]) by compute2.internal (MEProxy); Fri, 21 May 2021 16:08:15 -0400 X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvdejfedgudeghecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefofgggkfgjfhffhffvufgtgfesthhqredtreerjeenucfhrhhomhepfdet nhguhicunfhuthhomhhirhhskhhifdcuoehluhhtoheskhgvrhhnvghlrdhorhhgqeenuc ggtffrrghtthgvrhhnpedvleehjeejvefhuddtgeegffdtjedtffegveethedvgfejieev ieeufeevuedvteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfh hrohhmpegrnhguhidomhgvshhmthhprghuthhhphgvrhhsohhnrghlihhthidqudduiedu keehieefvddqvdeifeduieeitdekqdhluhhtoheppehkvghrnhgvlhdrohhrgheslhhinh hugidrlhhuthhordhush X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id A9E8F51C0060; Fri, 21 May 2021 16:08:13 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.5.0-alpha0-448-gae190416c7-fm-20210505.004-gae190416 Mime-Version: 1.0 Message-Id: <6c9c4597-a1af-4cbb-9dc8-424999d04793@www.fastmail.com> In-Reply-To: <87k0nraonu.ffs@nanos.tec.linutronix.de> References: <20210415044258.GA6318@zn.tnic> <20210415054713.GB6318@zn.tnic> <20210419141454.GE9093@zn.tnic> <20210419191539.GH9093@zn.tnic> <20210419215809.GJ9093@zn.tnic> <874kf11yoz.ffs@nanos.tec.linutronix.de> <87k0ntazyn.ffs@nanos.tec.linutronix.de> <37833625-3e6b-5d93-cc4d-26164d06a0c6@intel.com> <9c8138eb-3956-e897-ed4e-426bf6663c11@intel.com> <87pmxk87th.fsf@oldenburg.str.redhat.com> <939ec057-3851-d8fb-7b45-993fa07c4cb5@intel.com> <87r1i06ow2.fsf@oldenburg.str.redhat.com> <263a58a9-26d5-4e55-b3e1-3718baf1b81d@www.fastmail.com> <87k0nraonu.ffs@nanos.tec.linutronix.de> Date: Fri, 21 May 2021 13:07:52 -0700 From: "Andy Lutomirski" To: "Thomas Gleixner" , "Florian Weimer" , "Dave Hansen" Cc: "Dave Hansen via Libc-alpha" , "Len Brown" , "Rich Felker" , "Linux API" , "Bae, Chang Seok" , "the arch/x86 maintainers" , "Linux Kernel Mailing List" , "Kyle Huey" , "Borislav Petkov" , "Keno Fischer" , "Arjan van de Ven" , "Willy Tarreau" Subject: =?UTF-8?Q?Re:_Candidate_Linux_ABI_for_Intel_AMX_and_hypothetical_new_rel?= =?UTF-8?Q?ated_features?= Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 21 May 2021 20:08:20 -0000 On Fri, May 21, 2021, at 12:10 PM, Thomas Gleixner wrote: > On Fri, May 21 2021 at 09:31, Andy Lutomirski wrote: > > arch_prctl(SET_XSTATE_INIT_ON_FIRST_USE, TILE_STUFF);? > > > > As long as this is allowed to fail, I don=E2=80=99t have a huge prob= lem with > > it. >=20 > I'm fine with that. It's still controlled by the OS and can return > -EPERM. >=20 > If allowed then the application would also accept to be insta killed i= f > that #NM allocation fails. Any bug report vs. that will be ignored. >=20 > > I think several things here are regrettable: > > > > 1. Legacy XSTATE code might assume that XCR0 is a constant. > > > > 2. Intel virt really doesn=E2=80=99t like us context switching XCR0,= although > > we might say that this is Intel=E2=80=99s fault and therefore Intel=E2= =80=99s > > problem. AMD hardware doesn=E2=80=99t appear to have this issue. > > > > 3. AMX bring tangled up in XSTATE is unfortunate. The whole XSTATE > > mechanism is less than amazing. > > > > IMO the best we can make of this whole situation is to make XCR0 > > dynamic, but the legacy compatibility issues are potentially > > problematic. >=20 > Why? The bit can be enabled and #NM catches the violation of the ABI > contract if the application did not request usage. No XCR0 fiddling on= > context switch required. >=20 > Thanks, >=20 > tglx >=20 >=20 >=20 XFD does nothing about signals. It also doesn=E2=80=99t help give appli= cations a non-Linux-specific way to ask if AMX is available. The SDM say= s that one can read XCR0. Sure, we can use it, but cross platform libra= ries seem likely to get it wrong.