From: "Tulio Magno Quites Machado Filho" <tuliom@linux.vnet.ibm.com>
To: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>,
libc-alpha@sourceware.org
Subject: Re: [PATCHv2] powerpc: POWER8 memcpy optimization for cached memory
Date: Mon, 11 Dec 2017 19:48:00 -0000 [thread overview]
Message-ID: <87a7yp2ghu.fsf@linux.vnet.ibm.com> (raw)
In-Reply-To: <c1c65d6c-51cb-2be4-b292-cbad462e7983@linux.vnet.ibm.com>
Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> writes:
> On 12/09/2017 01:10 AM, Tulio Magno Quites Machado Filho wrote:
>> * manual/tunables.texi (Hardware Capability Tunables): Document
>> glibc.tune.cached_memopt.
>> * sysdeps/powerpc/cpu-features.c: New file.
>> * sysdeps/powerpc/cpu-features.h: New file.
>> * sysdeps/powerpc/dl-procinfo.c [!IS_IN(ldconfig)]: Add
>> _dl_powerpc_cpu_features.
>> * sysdeps/powerpc/dl-tunables.list: New file.
>> * sysdeps/powerpc/ldsodefs.h: Include cpu-features.h.
>> * sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h: .
>
> Comment missing.
Ooops.
>> * sysdeps/powerpc/powerpc64/dl-machine.h (INIT_ARCH): Initialize
>> use_aligned_memopt.
>
> Should this be moved to init-arch.h? (also use_cached_memopt)
Indeed.
Changed to:
* sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h
(INIT_ARCH): Initialize use_aligned_memopt.
* sysdeps/powerpc/powerpc64/dl-machine.h [defined(SHARED &&
IS_IN(rtld))]: Restrict dl_platform_init availability and
initialize CPU features used by tunables.
>> diff --git a/sysdeps/powerpc/powerpc64/multiarch/memcpy-power8-cached.S b/sysdeps/powerpc/powerpc64/multiarch/memcpy-power8-cached.S
>> new file mode 100644
>> index 0000000..e5b6f25
>> --- /dev/null
>> +++ b/sysdeps/powerpc/powerpc64/multiarch/memcpy-power8-cached.S
>> @@ -0,0 +1,179 @@
>> + stxvd2x v0,r0,r3
>> +L(dst_is_align_16):
>> + cmpldi cr7,r5,127
>> + ble cr7,L(tail_copy)
>> + addi r8,r5,-128
>> + mr r9,r12
>> + rldicr r8,r8,0,56
>> + li r11,16
>> + srdi r10,r8,7
>> + addi r0,r8,128
>> + addi r10,r10,1
>
> Can we directly do
> rldicr r0, r5, 0, 56
> srdi r10,r5,7
> instead of this sequence?
> 79 addi r8,r5,-128
> 81 rldicr r8,r8,0,56
> 83 srdi r10,r8,7
> 84 addi r0,r8,128
> 85 addi r10,r10,1
Yes. I changed that and made more changes for clarity:
- Replaced rldicr with clrrdi.
- Replace r0 with 0 where it's treated as an immediate.
Pushed as c9cd7b0ce5c5.
--
Tulio Magno
next prev parent reply other threads:[~2017-12-11 19:48 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-18 5:13 [PATCH] powerpc: Use aligned stores in memset Rajalakshmi Srinivasaraghavan
2017-08-18 6:21 ` Florian Weimer
2017-08-18 6:51 ` Rajalakshmi Srinivasaraghavan
2017-08-18 9:10 ` Florian Weimer
2017-08-18 12:13 ` Adhemerval Zanella
2017-09-12 10:30 ` Florian Weimer
2017-09-12 12:18 ` Zack Weinberg
2017-09-12 13:57 ` Steven Munroe
2017-09-12 14:37 ` Joseph Myers
2017-09-12 15:06 ` Zack Weinberg
2017-09-12 17:09 ` Florian Weimer
2017-09-12 13:38 ` Steven Munroe
2017-09-12 14:08 ` Florian Weimer
2017-09-12 14:16 ` Steven Munroe
2017-09-12 17:04 ` Florian Weimer
2017-09-12 19:21 ` Steven Munroe
2017-09-12 19:45 ` Florian Weimer
2017-09-12 20:25 ` Steven Munroe
2017-09-13 13:12 ` Tulio Magno Quites Machado Filho
2017-09-18 13:54 ` Florian Weimer
2017-10-03 18:29 ` Adhemerval Zanella
2017-10-05 12:13 ` Rajalakshmi Srinivasaraghavan
2017-11-08 18:52 ` Tulio Magno Quites Machado Filho
2017-12-08 19:52 ` [PATCHv2] powerpc: POWER8 memcpy optimization for cached memory Tulio Magno Quites Machado Filho
2017-12-08 20:06 ` Florian Weimer
2017-12-11 12:44 ` Tulio Magno Quites Machado Filho
2017-12-11 20:09 ` Adhemerval Zanella
2017-12-10 7:11 ` Rajalakshmi Srinivasaraghavan
2017-12-11 19:48 ` Tulio Magno Quites Machado Filho [this message]
2017-08-18 6:25 ` [PATCH] powerpc: Use aligned stores in memset Andrew Pinski
2017-08-21 2:20 ` Tulio Magno Quites Machado Filho
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