From: Florian Weimer <fweimer@redhat.com>
To: Adhemerval Zanella via Libc-alpha <libc-alpha@sourceware.org>
Subject: Re: [PATCH] x86: Copy IBT and SHSTK usable only if CET is enabled
Date: Thu, 24 Jun 2021 09:56:39 +0200 [thread overview]
Message-ID: <87fsx7n1ag.fsf@oldenburg.str.redhat.com> (raw)
In-Reply-To: <89312fbc-0fb1-8523-2c1c-c99025bb787e@linaro.org> (Adhemerval Zanella via Libc-alpha's message of "Wed, 23 Jun 2021 21:30:06 -0300")
* Adhemerval Zanella via Libc-alpha:
> + x86_cpu_AMD_IBPB = x86_cpu_index_80000008_ebx + 12,
> + x86_cpu_AMD_IBRS = x86_cpu_index_80000008_ebx + 14,
> + x86_cpu_AMD_STIBP = x86_cpu_index_80000008_ebx + 15,
> + x86_cpu_AMD_SSBD = x86_cpu_index_80000008_ebx + 24,
Do these show up as USABLE automatically? The test suggests to me that
they do.
This points to a deeper problem elsewhere: new bits should not become
available automatically, they must be copied over explicitly because
ld.so does not know the semantics for a new bit in USABLE.
Thanks,
Florian
next prev parent reply other threads:[~2021-06-24 7:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 14:54 [PATCH] x86: Fix tst-cpu-features-cpuinfo on Ryzen 9 (BZ #27873) Adhemerval Zanella
2021-06-23 20:41 ` H.J. Lu
2021-06-23 21:15 ` Adhemerval Zanella
2021-06-23 21:36 ` [PATCH] x86: Copy IBT and SHSTK usable only if CET is enabled H.J. Lu
2021-06-24 0:30 ` Adhemerval Zanella
2021-06-24 0:40 ` H.J. Lu
2021-06-24 12:17 ` Adhemerval Zanella
2021-06-24 12:27 ` H.J. Lu
2021-06-24 12:55 ` Adhemerval Zanella
2021-06-24 7:56 ` Florian Weimer [this message]
2021-06-24 12:07 ` Adhemerval Zanella
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