From: Andreas Schwab <schwab@linux-m68k.org>
To: Carlos O'Donell via Libc-alpha <libc-alpha@sourceware.org>
Subject: Re: [PATCH v4] x86_64: Update THREAD_SETMEM/THREAD_SETMEM_NC for IMM64
Date: Tue, 16 Mar 2021 10:04:50 +0100 [thread overview]
Message-ID: <87ft0vzcy5.fsf@igel.home> (raw)
In-Reply-To: <cfb041fe-55c2-249d-9b94-19658fa5234e@redhat.com> (Carlos O'Donell via Libc-alpha's message of "Mon, 15 Mar 2021 23:01:36 -0400")
On Mär 15 2021, Carlos O'Donell via Libc-alpha wrote:
> Then we try to fix this with the new sequence:
>
> asm volatile ("movq %q0,%%fs:%P1" :
> : "i" ((uint64_t) cast_to_integer (value)),
> "i" (offsetof (struct pthread, member)));
>
> Note that "%q0" is a machine constraint for any register.
An operand modifier isn't a constraint. It does not change what the
compiler matches for the operand, it only modifies the way the operand
is output. 'q' has no meaning for an operand matched by the 'i'
constraint, since that is never a register.
Andreas.
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
next prev parent reply other threads:[~2021-03-16 9:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-02 19:12 [PATCH] " H.J. Lu
2021-03-01 13:30 ` Carlos O'Donell
2021-03-02 14:21 ` [PATCH v2] " H.J. Lu
2021-03-08 22:28 ` Carlos O'Donell
2021-03-09 0:09 ` [PATCH v3] " H.J. Lu
2021-03-15 12:49 ` Carlos O'Donell
2021-03-15 13:29 ` [PATCH v4] " H.J. Lu
2021-03-16 3:01 ` Carlos O'Donell
2021-03-16 9:04 ` Andreas Schwab [this message]
2021-03-16 15:45 ` [PATCH v5] x86_64: Update THREAD_SETMEM/THREAD_SETMEM_NC for IMM64 [BZ #27591] H.J. Lu
2021-03-16 16:02 ` Andreas Schwab
2021-03-16 16:10 ` Florian Weimer
2021-03-16 16:34 ` Carlos O'Donell
2021-03-16 16:50 ` [PATCH v6] x86_64: Correct THREAD_SETMEM/THREAD_SETMEM_NC for movq " H.J. Lu
2021-03-16 16:52 ` H.J. Lu
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