From: Florian Weimer <fweimer@redhat.com>
To: sajan.karumanchi@amd.com
Cc: libc-alpha@sourceware.org, carlos@redhat.com,
premachandra.mallappa@amd.com
Subject: Re: [PATCH] x86: Optimizing memcpy for AMD Zen architecture.
Date: Wed, 28 Oct 2020 10:22:51 +0100 [thread overview]
Message-ID: <87h7qe1z84.fsf@oldenburg2.str.redhat.com> (raw)
In-Reply-To: <e86e2da7a7f9dce8885de3ae40c9e7e191f57fef.1603870335.git.sajan.karumanchi@amd.com> (sajan karumanchi's message of "Wed, 28 Oct 2020 13:05:33 +0530")
* sajan karumanchi:
> From: Sajan Karumanchi <sajan.karumanchi@amd.com>
>
> Modifying the shareable cache '__x86_shared_cache_size', which is a
> factor in computing the non-temporal threshold parameter
> '__x86_shared_non_temporal_threshold' to optimize memcpy for AMD Zen
> architectures.
> In the existing implementation, the shareable cache is computed as 'L3
> per thread, L2 per core'. Recomputing this shareable cache as 'L3 per
> CCX(Core-Complex)' has brought in performance gains.
> As per the large bench variant results, this patch also addresses the
> regression problem on AMD Zen architectures.
>
> Reviewed-by: Premachandra Mallappa <premachandra.mallappa@amd.com>
Thanks, I've pushed this version for you.
Florian
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next prev parent reply other threads:[~2020-10-28 9:23 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 4:50 [PATCH 0/1] " sajan.karumanchi
2020-10-22 4:50 ` [PATCH 1/1] x86: " sajan.karumanchi
2020-10-27 10:38 ` Florian Weimer
2020-10-28 7:35 ` [PATCH] " sajan.karumanchi
2020-10-28 9:22 ` Florian Weimer [this message]
2020-10-28 14:00 ` [PATCH 1/1] " H.J. Lu
2020-10-28 14:29 ` Florian Weimer
2020-10-28 14:44 ` H.J. Lu
2020-10-30 6:35 ` Karumanchi, Sajan
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