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From: Florian Weimer <fweimer@redhat.com>
To: "H.J. Lu via Libc-alpha" <libc-alpha@sourceware.org>
Subject: Re: V6 [PATCH 1/2] x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717]
Date: Mon, 18 Jan 2021 12:17:09 +0100	[thread overview]
Message-ID: <87im7uqytm.fsf@oldenburg.str.redhat.com> (raw)
In-Reply-To: <CAMe9rOoQFRKJuoDcMEwo5+YrtrQ4rjNiK9A52AYhCi0wtDojjQ@mail.gmail.com> (H. J. Lu via Libc-alpha's message of "Thu, 7 Jan 2021 12:58:27 -0800")

* H. J. Lu via Libc-alpha:

> +static void
> +dl_isa_level_check (struct link_map *m, const char *program)
> +{
> +  const struct cpu_features *cpu_features = __get_cpu_features ();
> +  unsigned int i;
> +  struct link_map *l;
> +
> +  i = m->l_searchlist.r_nlist;
> +  while (i-- > 0)
> +    {
> +      /* Check each shared object to see if ISA level is compatible.  */
> +      l = m->l_initfini[i];
> +
> +      /* Skip ISA level check if functions have been executed.  */
> +      if (l->l_init_called)
> +	continue;
> +
> +#ifdef SHARED
> +      /* Skip ISA level check for ld.so since ld.so won't run if its ISA
> +	 level is higher than CPU.  */
> +      if (l == &GL(dl_rtld_map) || l->l_real == &GL(dl_rtld_map))
> +	continue;
> +#endif
> +
> +      if ((l->l_x86_isa_1_needed & cpu_features->isa_1)
> +	  != l->l_x86_isa_1_needed)
> +	{
> +	  if (program)
> +	    _dl_fatal_printf ("%s: CPU ISA level is lower than required\n",
> +			      *l->l_name != '\0' ? l->l_name : program);
> +	  else
> +	    _dl_signal_error (0, l->l_name, "dlopen",
> +			      N_("CPU ISA level is lower than required"));
> +	}
> +    }
> +}

We may have hit an integration issue with this check.

It turns out that libvirt defaults to the qemu64 model.  It masks most
of the feature bits required by x86-64-v2.  Libvirt developers have
previously told me that nothing should be using the qemu64 model, but
it's still the default for API stability reasons (in the same way SSL 3
and DES used to be the default in crypto libraries, under the assumption
that if you negotiatied a particular protocol and set of algorithms in
1998, you'd still want the exact same choice fifteen years later).

But of course, despite no one should be using the qemu64 model, they
still do.  Here's an example:

  Guest: fix to always use host-passthrough CPU for all arches
  <https://github.com/clalancette/oz/pull/283>

One pecularity about x86-64-v2 is that under KVM virtualization, the new
structions added over the baseline do not actually trap (assuming the
host supports them).  So we could paper over this integration issue by
doing the check for x86-64-v3 and later only.  (Although it might not
work there—I looked at printing a nice error message for the same
situation when we transitioned to z13, but it it turned to be quite
difficult.)

Downstream, this would likely buy us about three years, in which we
could fix qemu64-type problems.  But maybe we should tackle this now.

I also hope to have a conversation about the libvirt developers
regarding defaults, but I'm still trying to figure out the appropriate
forum.

Thanks,
Florian

-- 
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Commercial register: Amtsgericht Muenchen, HRB 153243,
Managing Directors: Charles Cachera, Brian Klemm, Laurie Krebs, Michael O'Neill


  reply	other threads:[~2021-01-18 11:17 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-06 14:49 V5 [PATCH 0/2] x86: Support GNU_PROPERTY_X86_ISA_1_NEEDED " H.J. Lu
2020-12-06 14:49 ` V5 [PATCH 1/2] x86: Support GNU_PROPERTY_X86_ISA_1_V[234] " H.J. Lu
2021-01-06 12:00   ` Adhemerval Zanella
2021-01-06 17:11     ` V6 " H.J. Lu
2021-01-07 20:09       ` Adhemerval Zanella
2021-01-07 20:58         ` H.J. Lu
2021-01-18 11:17           ` Florian Weimer [this message]
2021-01-18 13:49             ` H.J. Lu
2021-01-18 15:15               ` Florian Weimer
2020-12-06 14:49 ` V5 [PATCH 2/2] ldconfig/x86: Add ISA level check to glibc-hwcaps H.J. Lu
2020-12-07 10:00   ` Florian Weimer
2020-12-08 13:25     ` H.J. Lu
2020-12-08 13:31       ` Florian Weimer
2020-12-08 14:10         ` H.J. Lu
2020-12-08 14:18           ` Florian Weimer
2020-12-08 14:23             ` H.J. Lu
2020-12-08 15:15               ` Florian Weimer
2020-12-08 15:31                 ` H.J. Lu
2020-12-09  3:27                   ` [PATCH] ldconfig/x86: Store ISA level in cache and aux cache H.J. Lu
2021-01-12 16:25                     ` Adhemerval Zanella
2021-01-12 23:32                       ` V2 " H.J. Lu
2021-01-13 13:47                         ` Adhemerval Zanella
2021-01-13 14:12                           ` H.J. Lu
2021-01-28 20:20                     ` Florian Weimer
2021-01-28 20:43                       ` H.J. Lu
2021-01-29  8:56                         ` Florian Weimer
2021-01-29 12:44                           ` H.J. Lu

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