From: Florian Weimer <fweimer@redhat.com>
To: Andrew Pinski <quic_apinski@quicinc.com>
Cc: <libc-alpha@sourceware.org>
Subject: Re: [PATCH v2 2/2] Aarch64: Add new memset for Qualcomm's 0ryon-1 core
Date: Tue, 14 May 2024 09:32:29 +0200 [thread overview]
Message-ID: <87ttj0vofm.fsf@oldenburg.str.redhat.com> (raw)
In-Reply-To: <20240508165924.874710-2-quic_apinski@quicinc.com> (Andrew Pinski's message of "Wed, 8 May 2024 09:59:24 -0700")
* Andrew Pinski:
> +L(try_zva):
> + /* Write the first and last 64 byte aligned block using stp rather
> + than using DC ZVA. This is faster on some cores.
> + */
The “some cores” part seems outdated if it's just a memset for the
Oryon-1 core (singulare). This comment and some others, for example
> + /*
> + * Adjust count and bias for loop. By subtracting extra 1 from count,
> + * it is easy to use tbz instruction to check whether loop tailing
> + * count is less than 33 bytes, so as to bypass 2 unnecessary stps.
> + */
do not use GNU style. This one is GNU style:
> + /* Set 64..96 bytes. Write 64 bytes from the start and
> + 32 bytes from the end. */
No separate start end end lines, no * indentation, space after the final .
Thanks,
Florian
next prev parent reply other threads:[~2024-05-14 7:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-08 16:59 [PATCH v2 1/2] Aarch64: Add memcpy for qualcomm's oryon-1 core Andrew Pinski
2024-05-08 16:59 ` [PATCH v2 2/2] Aarch64: Add new memset for Qualcomm's 0ryon-1 core Andrew Pinski
2024-05-13 13:48 ` Florian Weimer
2024-05-14 6:19 ` Andrew Pinski (QUIC)
2024-05-14 7:37 ` Florian Weimer
2024-05-14 7:47 ` Andrew Pinski (QUIC)
2024-05-14 9:10 ` Florian Weimer
2024-05-14 7:32 ` Florian Weimer [this message]
2024-05-14 7:40 ` Andrew Pinski (QUIC)
2024-05-22 23:01 ` Andrew Pinski (QUIC)
2024-05-23 13:08 ` Adhemerval Zanella Netto
2024-05-14 7:35 ` [PATCH v2 1/2] Aarch64: Add memcpy for qualcomm's oryon-1 core Florian Weimer
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