From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 76857 invoked by alias); 21 Aug 2017 02:20:46 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Received: (qmail 76639 invoked by uid 89); 21 Aug 2017 02:20:46 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=Hx-languages-length:1944, Manual X-HELO: mx0a-001b2d01.pphosted.com From: "Tulio Magno Quites Machado Filho" To: Rajalakshmi Srinivasaraghavan , libc-alpha@sourceware.org Cc: Subject: Re: [PATCH] powerpc: Use aligned stores in memset In-Reply-To: <1503033107-20047-1-git-send-email-raji@linux.vnet.ibm.com> References: <1503033107-20047-1-git-send-email-raji@linux.vnet.ibm.com> User-Agent: Notmuch/0.24.2 (http://notmuchmail.org) Emacs/25.2.1 (x86_64-redhat-linux-gnu) Date: Mon, 21 Aug 2017 02:20:00 -0000 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 x-cbid: 17082102-0028-0000-0000-0000083B95A5 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007582; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000223; SDB=6.00905322; UDB=6.00453647; IPR=6.00685525; BA=6.00005542; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016784; XFM=3.00000015; UTC=2017-08-21 02:20:40 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17082102-0029-0000-0000-000037395830 Message-Id: <87y3qdslu3.fsf@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-08-21_01:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1708210034 X-SW-Source: 2017-08/txt/msg00943.txt.bz2 Rajalakshmi Srinivasaraghavan writes: > The powerpc hardware does not allow unaligned accesses on non cacheable > memory. This patch avoids misaligned stores for sizes less than 8 in > memset to avoid such cases. Tested on powerpc64 and powerpc64le. This commit message is misleading. I think it's necessary to improve with: 1. Remove the first line. 2. Mention the performance impact and what causes it. 3. Reference the section "3.1.4.2 Alignment Interrupts" of the "POWER8 Processor User's Manual for the Single-Chip Module", which describes this behavior. 4. Mention which kind of programs are affected by the old behavior. > 2017-08-17 Rajalakshmi Srinivasaraghavan > > * sysdeps/powerpc/powerpc64/power8/memset.S: Store byte by byte > for unaligned inputs if size is less than 8. > --- > sysdeps/powerpc/powerpc64/power8/memset.S | 68 ++++++++++++++++++++++++++++++- > 1 file changed, 66 insertions(+), 2 deletions(-) > > diff --git a/sysdeps/powerpc/powerpc64/power8/memset.S b/sysdeps/powerpc/powerpc64/power8/memset.S > index 7ad3bb1b00..504bab0841 100644 > --- a/sysdeps/powerpc/powerpc64/power8/memset.S > +++ b/sysdeps/powerpc/powerpc64/power8/memset.S > @@ -377,7 +377,8 @@ L(write_LT_32): > subf r5,r0,r5 > > 2: bf 30,1f > - sth r4,0(r10) > + stb r4,0(r10) > + stb r4,1(r10) Needs a comment to prevent future mistakes in the future. > @@ -437,11 +438,74 @@ L(tail5): > /* Handles copies of 0~8 bytes. */ > .align 4 > L(write_LE_8): > - bne cr6,L(tail4) > + /* Use stb instead of sth which is safe for > + both aligned and unaligned inputs. */ I don't think "safe" is the correct term. What about this? Use stb instead of sth because it doesn't generate alignment interrupts on cache-inhibited storage. > + bne cr6,L(LE7_tail4) > + /* If input is word aligned, use stw, Else use stb. */ s/Else/else/ -- Tulio Magno