From: Peter Bergner <bergner@linux.ibm.com>
To: Amrita H S <amritahs@linux.vnet.ibm.com>
Cc: libc-alpha@sourceware.org, Paul E Murphy <murphyp@linux.ibm.com>,
Adhemerval Zanella <adhemerval.zanella@linaro.org>
Subject: Re: [V3] powerpc: Optimized strncmp for power10
Date: Mon, 6 May 2024 08:01:52 -0500 [thread overview]
Message-ID: <8821344d-23eb-4983-b417-55f05268c7de@linux.ibm.com> (raw)
In-Reply-To: <a7381d88-d25d-4e0a-85cf-7193fdda0f41@linux.ibm.com>
On 5/3/24 4:31 PM, Peter Bergner wrote:
> This code looks like it assumes the kernel is using a 4k page size.
> All distros that I know of and the default kernel config for ppc64
> and ppc64le kernels is to use a 64K HW page size. Is there a reason
> we're not checking for a 64k cache boundary here?
Talking with one of our kernel developers, there are a couple of
minor Linux distros building ppc64* kernels with 4K pages, so that
answers my question why we're using that here.
A good future project would be to either have a configure option
to state the page size to use or detect it at runtime from the
AT_PAGESZ AUXV entry and choose the right routine. Either way,
this current patch...
LGTM.
Reviewed-by: Peter Bergner <bergner@linux.ibm.com>
I'll take care of updating the Copyright dates and merging it for you.
Thanks!
Peter
next prev parent reply other threads:[~2024-05-06 13:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-29 9:58 Amrita H S
2024-05-03 21:31 ` Peter Bergner
2024-05-06 6:13 ` Florian Weimer
2024-05-06 12:55 ` Peter Bergner
2024-05-06 13:01 ` Peter Bergner [this message]
2024-05-06 14:10 ` Peter Bergner
2024-05-06 13:04 ` Adhemerval Zanella Netto
2024-05-06 14:16 ` Peter Bergner
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