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From: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
To: Daniel Cederman <cederman@gaisler.com>, libc-alpha@sourceware.org
Cc: daniel@gaisler.com, andreas@gaisler.com
Subject: Re: [PATCH] sparc: Force calculation that raises exception
Date: Fri, 12 Jan 2024 13:45:59 -0300	[thread overview]
Message-ID: <8dee0ad6-196b-40c1-b3fb-6be7147d8dc7@linaro.org> (raw)
In-Reply-To: <20240112092628.2464455-3-cederman@gaisler.com>



On 12/01/24 06:26, Daniel Cederman wrote:
> Read out the FPU control word to force the calculation to complete and
> raise the exception.
> 
> With this change the math/test-fenv test pass for LEON.

Is this to try mitigate 'GRFPU Floating-point controller: Missing 
FDIV/FSQRT Result' [1]?

If so, wouldn't be better to use '-mfix-ut699' when building against
leon3? There are potentially multiple usages of FDIV/FSQRT within 
libc/libm that might be subject to this issue.

At least recent gcc versions seems to add the required nops after fsqrt:

$ cat t.c
#include <math.h>
#include <float.h>

#define math_force_eval(x)                                              \
  ({ __typeof (x) __x = (x); __asm __volatile__ ("" : : "m" (__x)); })

int foo (void)
{
  static const struct {
    double zero, one, max, min, pi;
  } c = {
    0.0, 1.0, DBL_MAX, DBL_MIN, M_PI
  };
  double d;
  asm ("" : "=e" (d) : "0" (c.zero));
  d /= c.zero;
  __asm __volatile ("" : : "e" (d));
}
$ sparc64-linux-gnu -m32 -mcpu=leon3 -O2 -mhard-float -mfix-ut699 t.c -S -o -
[...]
foo:
        sethi   %hi(.LC0), %g1
        ldd     [%g1+%lo(.LC0)], %f10
        fmovs   %f10, %f8
        fmovs   %f11, %f9
        fdivd   %f8, %f10, %f8
        std     %f8, [%sp-8]
        nop
        nop
        jmp     %o7+8
[...]

In any case this penalize non-leon3 chips with the extra 'stx fsr,...', so
it should be used only for leon (and with a proper explanation of why it is
required).

[1] https://www.gaisler.com/doc/antn/GRLIB-TN-0013.pdf

> 
> Signed-off-by: Daniel Cederman <cederman@gaisler.com>
> ---
>  sysdeps/sparc/fpu/fraiseexcpt.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/sysdeps/sparc/fpu/fraiseexcpt.c b/sysdeps/sparc/fpu/fraiseexcpt.c
> index 26a7720ec9..43176cf6a3 100644
> --- a/sysdeps/sparc/fpu/fraiseexcpt.c
> +++ b/sysdeps/sparc/fpu/fraiseexcpt.c
> @@ -20,6 +20,7 @@
>  #include <float.h>
>  #include <math.h>
>  #include <shlib-compat.h>
> +#include <fpu_control.h>
>  
>  int
>  __feraiseexcept (int excepts)
> @@ -30,6 +31,7 @@ __feraiseexcept (int excepts)
>      0.0, 1.0, DBL_MAX, DBL_MIN, M_PI
>    };
>    double d;
> +  fpu_control_t cw;
>  
>    /* Raise exceptions represented by EXPECTS.  But we must raise only
>       one signal at a time.  It is important the if the overflow/underflow
> @@ -43,6 +45,7 @@ __feraiseexcept (int excepts)
>        __asm ("" : "=e" (d) : "0" (c.zero));
>        d /= c.zero;
>        __asm __volatile ("" : : "e" (d));
> +      _FPU_GETCW(cw);
>      }
>  
>    /* Next: division by zero.  */
> @@ -51,6 +54,7 @@ __feraiseexcept (int excepts)
>        __asm ("" : "=e" (d) : "0" (c.one));
>        d /= c.zero;
>        __asm __volatile ("" : : "e" (d));
> +      _FPU_GETCW(cw);
>      }
>  
>    /* Next: overflow.  */
> @@ -59,6 +63,7 @@ __feraiseexcept (int excepts)
>        __asm ("" : "=e" (d) : "0" (c.max));
>        d *= d;
>        __asm __volatile ("" : : "e" (d));
> +      _FPU_GETCW(cw);
>      }
>  
>    /* Next: underflow.  */
> @@ -67,6 +72,7 @@ __feraiseexcept (int excepts)
>        __asm ("" : "=e" (d) : "0" (c.min));
>        d *= d;
>        __asm __volatile ("" : : "e" (d));
> +      _FPU_GETCW(cw);
>      }
>  
>    /* Last: inexact.  */
> @@ -75,6 +81,7 @@ __feraiseexcept (int excepts)
>        __asm ("" : "=e" (d) : "0" (c.one));
>        d /= c.pi;
>        __asm __volatile ("" : : "e" (d));
> +      _FPU_GETCW(cw);
>      }
>  
>    /* Success.  */

  reply	other threads:[~2024-01-12 16:46 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-12  9:26 [PATCH] sparc: Do not test preservation of NaN payloads for LEON Daniel Cederman
2024-01-12  9:26 ` [PATCH] sparc: Prevent stfsr from directly following floating-point instruction Daniel Cederman
2024-01-12 14:38   ` Adhemerval Zanella Netto
2024-01-15  9:37     ` Daniel Cederman
2024-01-12  9:26 ` [PATCH] sparc: Force calculation that raises exception Daniel Cederman
2024-01-12 16:45   ` Adhemerval Zanella Netto [this message]
2024-01-15  9:41     ` Daniel Cederman
2024-01-15 11:47       ` Adhemerval Zanella Netto
2024-01-12  9:26 ` [PATCH] sparc: Treat the version field in the FPU control word as reserved Daniel Cederman
2024-01-12 17:42   ` Adhemerval Zanella Netto
2024-02-15  9:31     ` Daniel Cederman
2024-02-19 14:55       ` Adhemerval Zanella Netto
2024-01-12  9:26 ` [PATCH] sparc: Fix llrint and llround missing exceptions on SPARC32 Daniel Cederman
2024-01-12 18:05   ` Adhemerval Zanella Netto
2024-01-15 14:38     ` Daniel Cederman
2024-01-15 17:52       ` Adhemerval Zanella Netto
2024-01-12  9:26 ` [PATCH] sparc: Remove unwind information from signal return stub functions Daniel Cederman
2024-01-15 13:41   ` Adhemerval Zanella Netto
2024-01-15 14:22     ` Daniel Cederman
2024-01-15 16:57       ` Adhemerval Zanella Netto
2024-01-16 15:37 ` [PATCH] sparc: Do not test preservation of NaN payloads for LEON Adhemerval Zanella Netto

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