From: Shiqi Zhang <shiqi@isrc.iscas.ac.cn>
To: Richard Henderson <richard.henderson@linaro.org>,
libc-alpha@sourceware.org
Cc: schwab@linux-m68k.org
Subject: Re: [PATCH v2] riscv: Add macros for FPUCW/fcsr in fpu_control.h
Date: Tue, 14 Feb 2023 03:31:12 +0800 [thread overview]
Message-ID: <930b7930-03df-4961-f0b9-28edc9c4acac@isrc.iscas.ac.cn> (raw)
In-Reply-To: <191630a8-913e-74bd-2052-8199290ee0df@linaro.org>
Oh, honestly I didn't notice the consistency in macros of rounding
modes. I only checked the exception masks and found them inconsistent
between architectures, so I decided to name them as defined in RISC-V
specs. Maybe I'll change the names of macros for rounding modes in v3.
Thank you for pointing that out.
Note that the rounding modes available in RISC-V is not exactly the same
as x86: the rounding mode "Round to nearest, ties to max magnitude"
doesn't exist in x86. Any ideas about naming the macro for that?
FYI, exception-related macros in different archs:
x86: _FPU_MASK_OM
m68k: _FPU_MASK_OVFL
mips: _FPU_MASK_O
aarch64: _FPU_FPCR_MASK_OFE
loongarch: _FPU_MASK_O
csky: _FPU_MASK_OFE
Also, I think it's inappropriate to name exception flags "_FPU_MASK_*M"
because instead of marking the bit as 1 for masking the exception,
RISC-V marks the bit as 1 for raising the exception, so I prefer
something like "_FPU_EXCEPT", "_FPU_RAISE", "_FPU_ACCRUE" or just
"_FPU_FLAG".
At 2023/2/14 2:17, Richard Henderson wrote:
> On 2/12/23 20:16, Shiqi Zhang wrote:
>>
>>> Honestly, no one should be using <fpu_control.h> at all. It was
>>> originally an x86 specific thing. The only reason to fill in this
>>> header at all is to match the original x86 API. Therefore the symbol
>>> names should match ./sysdeps/x86/fpu_control.h.
>>
>>
>> Actually other architectures also defines these arch-specific macros in
>> ./sysdeps/***/fpu_control.h. And the symbol names doesn't match x86,
>> too. For example I checked the macro _FPU_FPCR_MASK_OFE in
>> ./sysdeps/aarch64/fpu/fpu_control.h, nothing in glibc referenced it so I
>> think it can only be for the users to control FPU in an arch-specific
>> manner.
>
> Oh the other hand, note the number of targets that use
>
> _FPU_RC_NEAREST, _FPU_RC_DOWN, _FPU_RC_UP, _FPU_RC_ZERO
>
> x86, alpha, csky, loongarch, m68k, mips, ppc, sparc, sh (nearest, zero).
>
> Indeed, arm and aarch64 seem to be the outliers in being completely
> different.
>
>
> r~
prev parent reply other threads:[~2023-02-13 19:31 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-12 6:52 Shiqi Zhang
2023-02-12 19:36 ` Richard Henderson
2023-02-13 6:16 ` Shiqi Zhang
2023-02-13 8:39 ` Andreas Schwab
2023-02-13 10:17 ` Shiqi Zhang
2023-02-13 22:00 ` Joseph Myers
2023-02-13 18:17 ` Richard Henderson
2023-02-13 19:31 ` Shiqi Zhang [this message]
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