From: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
To: daichengrong@iscas.ac.cn, libc-alpha@sourceware.org
Cc: aswaterman@gmail.com, palmer@rivosinc.com, darius@bluespec.com,
jiageng08@iscas.ac.cn
Subject: Re: [PATCH v4 3/4] add rvv memcpy in ifunc-impl-list
Date: Wed, 22 Jan 2025 09:19:23 -0300 [thread overview]
Message-ID: <9a2a7235-cce6-4161-9c1d-0d9ce7f4fa2c@linaro.org> (raw)
In-Reply-To: <20250122020401.187099-4-daichengrong@iscas.ac.cn>
On 21/01/25 23:04, daichengrong@iscas.ac.cn wrote:
> From: daichengrong <daichengrong@iscas.ac.cn>
This patch should be squashed with the last one, otherwise this will break
glibc build.
>
> ---
> .../unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> index 1c1deca8f6..01846a7414 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/ifunc-impl-list.c
> @@ -27,6 +27,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
> size_t i = max;
>
> bool fast_unaligned = false;
> + bool rvv_ext = false;
>
> struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_CPUPERF_0 };
> if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
> @@ -34,7 +35,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
> == RISCV_HWPROBE_MISALIGNED_FAST)
> fast_unaligned = true;
>
> + pair.key = RISCV_HWPROBE_KEY_IMA_EXT_0;
> + pair.value = 0;
> + if (__riscv_hwprobe (&pair, 1, 0, NULL, 0) == 0
> + && (pair.value & RISCV_HWPROBE_IMA_V) == RISCV_HWPROBE_IMA_V)
> + rvv_ext = true;
Maybe issue only one __riscv_hwprobe? Afaiu its idea is to allow query multiple
hardware support with only one call.
> +
> IFUNC_IMPL (i, name, memcpy,
> + IFUNC_IMPL_ADD (array, i, memcpy, rvv_ext,
> + __memcpy_vector)
> IFUNC_IMPL_ADD (array, i, memcpy, fast_unaligned,
> __memcpy_noalignment)
> IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_generic))
next prev parent reply other threads:[~2025-01-22 12:19 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-22 2:03 [PATCH v4 0/4] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC daichengrong
2025-01-22 2:03 ` [PATCH v4 1/4] add a configure test to check if the compiler supports rvv daichengrong
2025-01-22 12:16 ` Adhemerval Zanella Netto
2025-01-22 2:03 ` [PATCH v4 2/4] add macro support for dl_hwcap daichengrong
2025-01-22 2:04 ` [PATCH v4 3/4] add rvv memcpy in ifunc-impl-list daichengrong
2025-01-22 12:19 ` Adhemerval Zanella Netto [this message]
2025-01-22 16:34 ` Darius Rad
2025-01-22 2:04 ` [PATCH v4 4/4] add riscv vector support for memcpy daichengrong
2025-01-22 12:30 ` Adhemerval Zanella Netto
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