From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa1-x29.google.com (mail-oa1-x29.google.com [IPv6:2001:4860:4864:20::29]) by sourceware.org (Postfix) with ESMTPS id 846AF3858D35 for ; Wed, 26 Jul 2023 17:03:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 846AF3858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-oa1-x29.google.com with SMTP id 586e51a60fabf-1bb590d5cc0so59448fac.1 for ; Wed, 26 Jul 2023 10:03:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1690391019; x=1690995819; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=a68fAGSpXeG7NNozP4hAMSj7C8f1iGqlqX5YpPkS/u8=; b=P2QRtAobOCZbzRFpM1ZQWgQcvGn2AZrA16E+s3xw18RdUWdUHAjx0GJ7IdV2OI2yb/ QLgWKc+XTAFpu10Qqq8MBSQ5I2xUAsmELSpcsqpB1Hh61iDdqjGrJm0tk7f0J9PfkrLq PFzuh7/q1mgSracjV8+Dm0MQ0IC9A2GqaxTUV7f1StIyRI1ofjOCRLllhXC/iIDZQ05Q yFWkFX5/5gysFLQTPuGMBL4Z6hMYBpWu6gcEeS7906Rpft45Vep6E/ufsVPwI8FW6Q6t TYhtKwtExnHsUK45Tu2IL+StmvUifVW3ecZAjlv8JAaDiH52uyXQAazsk30NUr7ovtDx 58Wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690391019; x=1690995819; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a68fAGSpXeG7NNozP4hAMSj7C8f1iGqlqX5YpPkS/u8=; b=JdApsM1M1EgfaP5SjsgOmcE+q7tFF7AYEmewiAJ0RDojRAMdFgY5OGhViR89NydFCT qeuK5QWlHKS4EtY2vPGvNNr7yHjxgcjwSm/qUjfY6wRpR+cVZyMuoXuFbsv2XAoTnR65 q1kP1vkjlJWvxq/Wj4b1UVtFQPLmYFIC5zVciHK5A2bETtHtKLDP4AWoa2zuB/yVmj0s oguBOufvZlGgt8HfLeC4NKtTqQRfy54bTSfUvrEeu1l7CPPMhHubH1Lv0ml43FF+DgKl MeFMjChQzcVzDP/E62CS5oqPJe6I5EVVPnwbSxtoir5pW5VZxURWvG5u9Bap2s1xTUCk zdzg== X-Gm-Message-State: ABy/qLZ7uqDuK8VYXoJmJiaeBPyDSVjUOjZsnP/hxMYzNOXhQzaiJoa6 Xk3ldafdgx7Eb32AopcWULPRNMZU8X+c/Usr/Fe0AHUjOLw= X-Google-Smtp-Source: APBJJlErrNXsDckwY4cnnMpsmKTvzZqKKNRf+e1APbLASF9A7WGQzsiQY4vN5SJ6dyXNKuHhS2QhtGX6VlG4JfVUGTg= X-Received: by 2002:a05:6870:a40b:b0:1ba:52e8:cfe with SMTP id m11-20020a056870a40b00b001ba52e80cfemr141779oal.22.1690391019213; Wed, 26 Jul 2023 10:03:39 -0700 (PDT) MIME-Version: 1.0 References: <20230726152016.2246387-1-hjl.tools@gmail.com> In-Reply-To: <20230726152016.2246387-1-hjl.tools@gmail.com> From: Noah Goldstein Date: Wed, 26 Jul 2023 12:03:22 -0500 Message-ID: Subject: Re: [PATCH v2] : Add APX support To: "H.J. Lu" Cc: libc-alpha@sourceware.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-8.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Jul 26, 2023 at 10:20=E2=80=AFAM H.J. Lu via Libc-alpha wrote: > > Add support for Intel Advanced Performance Extensions: > > https://www.intel.com/content/www/us/en/developer/articles/technical/adva= nced-performance-extensions-apx.html > > to . > --- > manual/platform.texi | 3 +++ > sysdeps/x86/bits/platform/x86.h | 1 + > sysdeps/x86/cpu-features.c | 4 ++++ > sysdeps/x86/include/cpu-features.h | 4 ++++ > sysdeps/x86/tst-get-cpu-features.c | 2 ++ > 5 files changed, 14 insertions(+) > > diff --git a/manual/platform.texi b/manual/platform.texi > index c6ed73cb97..2a2d557067 100644 > --- a/manual/platform.texi > +++ b/manual/platform.texi > @@ -209,6 +209,9 @@ The supported processor features are: > @item > @code{AMX_TILE} -- Tile architecture. > > +@item > +@code{APX_F} -- The APX instruction extensions. > + > @item > @code{ARCH_CAPABILITIES} -- IA32_ARCH_CAPABILITIES MSR. > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/= x86.h > index 6555f9b91d..88ca071aa7 100644 > --- a/sysdeps/x86/bits/platform/x86.h > +++ b/sysdeps/x86/bits/platform/x86.h > @@ -312,6 +312,7 @@ enum > x86_cpu_AVX_NE_CONVERT =3D x86_cpu_index_7_ecx_1_edx + 5, > x86_cpu_AMX_COMPLEX =3D x86_cpu_index_7_ecx_1_edx + 8, > x86_cpu_PREFETCHI =3D x86_cpu_index_7_ecx_1_edx + 14, > + x86_cpu_APX_F =3D x86_cpu_index_7_ecx_1_edx + 2= 1, > > x86_cpu_index_19_ebx > =3D (CPUID_INDEX_19 * 8 * 4 * sizeof (unsigned int) > diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c > index 9ac195810f..badf088874 100644 > --- a/sysdeps/x86/cpu-features.c > +++ b/sysdeps/x86/cpu-features.c > @@ -226,6 +226,10 @@ update_active (struct cpu_features *cpu_features) > CPU_FEATURE_SET_ACTIVE (cpu_features, AMX_COMPLEX); > } > > + /* APX is usable only if the APX state is supported by kernel. */ > + if ((xcrlow & bit_APX_state) !=3D 0) > + CPU_FEATURE_SET_ACTIVE (cpu_features, APX_F); > + > /* These features are usable only when OSXSAVE is enabled. */ > CPU_FEATURE_SET (cpu_features, XSAVE); > CPU_FEATURE_SET_ACTIVE (cpu_features, XSAVEOPT); > diff --git a/sysdeps/x86/include/cpu-features.h b/sysdeps/x86/include/cpu= -features.h > index c740e1a5fc..eb30d342a6 100644 > --- a/sysdeps/x86/include/cpu-features.h > +++ b/sysdeps/x86/include/cpu-features.h > @@ -319,6 +319,7 @@ enum > #define bit_cpu_AVX_NE_CONVERT (1u << 5) > #define bit_cpu_AMX_COMPLEX (1u << 8) > #define bit_cpu_PREFETCHI (1u << 14) > +#define bit_cpu_APX_F (1u << 21) > > /* CPUID_INDEX_19. */ > > @@ -562,6 +563,7 @@ enum > #define index_cpu_AVX_NE_CONVERT CPUID_INDEX_7_ECX_1 > #define index_cpu_AMX_COMPLEX CPUID_INDEX_7_ECX_1 > #define index_cpu_PREFETCHI CPUID_INDEX_7_ECX_1 > +#define index_cpu_APX_F CPUID_INDEX_7_ECX_1 > > /* CPUID_INDEX_19. */ > > @@ -807,6 +809,7 @@ enum > #define reg_AVX_NE_CONVERT edx > #define reg_AMX_COMPLEX edx > #define reg_PREFETCHI edx > +#define reg_APX_F edx > > /* CPUID_INDEX_19. */ > > @@ -845,6 +848,7 @@ enum > #define bit_ZMM16_31_state (1u << 7) > #define bit_XTILECFG_state (1u << 17) > #define bit_XTILEDATA_state (1u << 18) > +#define bit_APX_state (1u << 19) > > enum cpu_features_kind > { > diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu= -features.c > index 1bd7e0be53..b27fa7324a 100644 > --- a/sysdeps/x86/tst-get-cpu-features.c > +++ b/sysdeps/x86/tst-get-cpu-features.c > @@ -219,6 +219,7 @@ do_test (void) > CHECK_CPU_FEATURE_PRESENT (AVX_NE_CONVERT); > CHECK_CPU_FEATURE_PRESENT (AMX_COMPLEX); > CHECK_CPU_FEATURE_PRESENT (PREFETCHI); > + CHECK_CPU_FEATURE_PRESENT (APX_F); > CHECK_CPU_FEATURE_PRESENT (AESKLE); > CHECK_CPU_FEATURE_PRESENT (WIDE_KL); > CHECK_CPU_FEATURE_PRESENT (PTWRITE); > @@ -390,6 +391,7 @@ do_test (void) > CHECK_CPU_FEATURE_ACTIVE (AVX_NE_CONVERT); > CHECK_CPU_FEATURE_ACTIVE (AMX_COMPLEX); > CHECK_CPU_FEATURE_ACTIVE (PREFETCHI); > + CHECK_CPU_FEATURE_ACTIVE (APX_F); > CHECK_CPU_FEATURE_ACTIVE (AESKLE); > CHECK_CPU_FEATURE_ACTIVE (WIDE_KL); > CHECK_CPU_FEATURE_ACTIVE (PTWRITE); > -- > 2.41.0 > LGTM