From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by sourceware.org (Postfix) with ESMTPS id 5C9073881D2B for ; Wed, 5 Apr 2023 21:03:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5C9073881D2B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-932072d4c00so91788266b.1 for ; Wed, 05 Apr 2023 14:03:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1680728638; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=m8wjUFft1qZES7ZA6olo5ClAo3AuUehVUV9chFVwKVM=; b=glA4so5/pu3BVH/feouG2Pn2ZzdG0QfQiOKXOI865fgo3F6Dn4Z0ZYZyDScNl0HQG0 +kOJtRzUNKQ/vciUZzjaxVgIxK3gBNXeptA1czLWNdfrlbllg2wQzlpLXrRKIZqyTiWf z2/NI3drsGjP0grLdO/bU06S7s6GaEHvX5lX+Uvz30+uuJEjNMqY3teuGZCMVny4LNvF NZd3nMl7/erVZAc+bxuzby1vELjaE4xkLjxJ/asZQu5BpYAo8SZ/ou655zhiQvqUqOHs eUX9ZTG6C53O4Sqm7qMhp8AU1lHmy7QMmzOsgFjtoETXL/JSXTii7KZXpQeWp7N1XorJ luHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680728638; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m8wjUFft1qZES7ZA6olo5ClAo3AuUehVUV9chFVwKVM=; b=SjMkZGsoaHt5WzbK10NvHo7DV2Jg7KTCSQQfYUkHLAiY3FMLnLXHTRyFnWDvD5XVUs RD3ApSPh4/YvxQYMgAYCRLtyy+7NteOR9Q+1dPoHdX40POaYH4IhCBfHJ0yRpNeefJDG 9/6z6OAEf088465c4JoccFjU5/Ar83QUBFzNpo9BZWBwG7GazWCLQ9gKKU2CXGSFEI0j HarbQtrg/uRH2vpHx3fnAaaJZJrLShpNahYZtAA9MgUVOgj53V+3B/xM+EjOGrypXvad GQ8xjLJrcRK65sfg+5ZrU1WdgWOSqSkqRDAhaS9s0655zziFuwrvnUiD/2CmiJm3cgcb OwTQ== X-Gm-Message-State: AAQBX9dXi1A9BWjeYFnLc3afjHIzkELdYv9t3wZHKzMsj7luzjjbAOk2 GTVeNSowETDRca7qevpbGNujp7XwqdYJQHkLonQ= X-Google-Smtp-Source: AKy350ZGLkKnP/zZDmyzd3oR3Uy3kZ4iGT6G+YC3gmXR8bog0AvZ462LxtshC2cm4YU1apQ+IdeXKhi8hrIira8ULSY= X-Received: by 2002:a50:cd07:0:b0:4fa:7e99:9e2c with SMTP id z7-20020a50cd07000000b004fa7e999e2cmr1977270edi.0.1680728637857; Wed, 05 Apr 2023 14:03:57 -0700 (PDT) MIME-Version: 1.0 References: <20230405162144.984598-1-hjl.tools@gmail.com> <20230405162144.984598-8-hjl.tools@gmail.com> In-Reply-To: <20230405162144.984598-8-hjl.tools@gmail.com> From: Noah Goldstein Date: Wed, 5 Apr 2023 16:03:46 -0500 Message-ID: Subject: Re: [PATCH 07/19] : Add LBR support To: "H.J. Lu" Cc: libc-alpha@sourceware.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Wed, Apr 5, 2023 at 11:23=E2=80=AFAM H.J. Lu via Libc-alpha wrote: > > Add architectural LBR support to . > --- > manual/platform.texi | 3 +++ > sysdeps/x86/bits/platform/x86.h | 2 +- > sysdeps/x86/tst-get-cpu-features.c | 1 + > 3 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/manual/platform.texi b/manual/platform.texi > index 2ab687cbba..b72518ebd8 100644 > --- a/manual/platform.texi > +++ b/manual/platform.texi > @@ -406,6 +406,9 @@ the indirect branch predictor barrier (IBPB). > @item > @code{LAM} -- Linear Address Masking. > > +@item > +@code{LBR} -- Architectural LBR. > + > @item > @code{LM} -- Long mode. > > diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/= x86.h > index 6d9dd6dacf..1040c2aed4 100644 > --- a/sysdeps/x86/bits/platform/x86.h > +++ b/sysdeps/x86/bits/platform/x86.h > @@ -219,7 +219,7 @@ enum > x86_cpu_TSXLDTRK =3D x86_cpu_index_7_edx + 16, > x86_cpu_INDEX_7_EDX_17 =3D x86_cpu_index_7_edx + 17, > x86_cpu_PCONFIG =3D x86_cpu_index_7_edx + 18, > - x86_cpu_INDEX_7_EDX_19 =3D x86_cpu_index_7_edx + 19, > + x86_cpu_LBR =3D x86_cpu_index_7_edx + 19, > x86_cpu_IBT =3D x86_cpu_index_7_edx + 20, > x86_cpu_INDEX_7_EDX_21 =3D x86_cpu_index_7_edx + 21, > x86_cpu_AMX_BF16 =3D x86_cpu_index_7_edx + 22, > diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu= -features.c > index 8b7e70aee1..cfc8692392 100644 > --- a/sysdeps/x86/tst-get-cpu-features.c > +++ b/sysdeps/x86/tst-get-cpu-features.c > @@ -166,6 +166,7 @@ do_test (void) > CHECK_CPU_FEATURE_PRESENT (SERIALIZE); > CHECK_CPU_FEATURE_PRESENT (HYBRID); > CHECK_CPU_FEATURE_PRESENT (TSXLDTRK); > + CHECK_CPU_FEATURE_PRESENT (LBR); > CHECK_CPU_FEATURE_PRESENT (PCONFIG); > CHECK_CPU_FEATURE_PRESENT (IBT); > CHECK_CPU_FEATURE_PRESENT (AMX_BF16); > -- > 2.39.2 > LGTM Reviewed-by: Noah Goldstein